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Senior Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)

Cisco Systems
August 22, 2026
Full-time
Remote friendly (San Jose, California, United States)
Worldwide
$194,600 - $285,700 USD yearly
ASIC Design Jobs, Level - Senior

Job Title

Senior Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)

Role Summary

Design and productize ultra-deep submicron CMOS analog and mixed-signal ICs for high-speed optical transceivers (100G, 400G, 1T). The role sits in the Mixed-signal IC design group and collaborates closely with digital/DSP, system, package, and module teams.

Hybrid position with an on-site expectation of three days per week at the San Jose, CA office.

Experience Level

Senior-level engineering role. See Education Requirements for degree-specific experience thresholds.

Responsibilities

Lead architecture, design, verification, and productization of high-speed analog and mixed-signal blocks on complex ASICs; mentor engineers and coordinate cross-functional integration.

  • Architect, design, layout, measure, and productize ultra-deep submicron CMOS AMS circuits.
  • Lead design of large blocks, track deliverables, perform peer reviews, and establish design methodology from conception through production.
  • Develop high-speed AMS circuits (SERDES, data converters, PLLs, equalizers, drivers, op amps, PGAs) for optical transceivers.
  • Collaborate with packaging and hardware teams to meet signal and power integrity requirements.
  • Support measurement, validation, and production bring-up activities.

Requirements

Core technical skills and demonstrated experience required for success in this role.

  • Proven experience designing, simulating, and measuring high-speed ICs; experience must cover at least three of the following areas: high-speed serial links (SERDES), data converters, voltage regulators, output drivers, PLLs/clock transmission, op amps, programmable gain amplifiers, or equalization.
  • Demonstrated ability to lead complex analog/mixed-signal blocks and mentor junior engineers.
  • Hands-on layout and floorplanning experience to meet high-frequency signal and power integrity constraints.
  • Experience with mixed-signal simulation and lab measurements for verification and debug.
  • Strong collaboration skills working with system, DSP/digital, packaging, and hardware teams.
  • Preferred / Nice-to-have: experience with electrical transceiver applications (backplane/cable), FinFET technology, high-frequency passive component design (inductors, transformers, transmission lines), custom transistor layout, design for manufacturability, ESD lab practices, and tool experience such as Cadence Virtuoso, Spectre/APS/SpectreX, Matlab, EMX, and AMS simulations.

Education Requirements

Bachelor of Science in Electrical Engineering (BSEE) with 12+ years of relevant experience, or Master of Science (MS) with 8+ years, or PhD with 5+ years of relevant experience, or equivalent practical experience. (Degree-and-years thresholds are the stated minimums for this senior role.)


About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

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Date Posted: 2026-08-21