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Senior Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)

Cisco Systems
May 31, 2026
Full-time
Remote friendly (San Jose, California, United States)
Worldwide
$191,400 - $281,400 USD yearly
ASIC Design Jobs, Level - Senior

Job Title

Senior Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)

Role Summary

Member of the mixed-signal IC design group developing high-speed and high-accuracy analog designs for optical transceivers (100G–1T) used in data center and telecom networks. The team delivers analog blocks that integrate into ASICs and works closely with digital/DSP, system, package, and module teams.

This is a hybrid role requiring three days per week in the San Jose, CA office.

Experience Level

Senior β€” the role expects an experienced engineer (see Education Requirements for specific experience equivalencies).

Responsibilities

Design, verify, and productize advanced mixed-signal CMOS ICs and lead a large block on complex chips.

  • Architect, design, layout, measure, and productize ultra-deep-submicron CMOS analog and mixed-signal circuits.
  • Lead design efforts for large blocks, track deliverables, and participate in peer reviews.
  • Mentor and coordinate with team members across analog, digital/DSP, packaging, and hardware groups.
  • Ensure signal and power integrity through collaboration with packaging and hardware teams.
  • Develop test plans and participate in laboratory validation and characterization.
  • Drive design methodology from concept through production and manufacturability.

Requirements

Core technical requirements and key skills for the role.

Must-have:

  • Proven experience designing, simulating, and measuring high-speed ICs; experience should include working across at least three of the following areas: high-speed serial links (serdes), serializers/deserializers, data converters, voltage regulators, output drivers, phase-locked loops, clock transmission/propagation, op amps, programmable gain amplifiers, and equalization.
  • Hands-on mixed-signal circuit design and high-speed analog implementation, including measurement and characterization.
  • Experience with mixed-signal simulation flows and tools.
  • Ability to lead complex IC design reviews and mentor junior engineers.

Nice-to-have / Preferred:

  • Experience with electrical transceiver applications (backplane and cable communications) and photonic transceiver products.
  • FinFET process experience and high-frequency/custom transistor layout expertise.
  • Layout experience for passives (inductors, transformers, transmission lines) and floorplanning for power/ground and analog/digital routing.
  • Design-for-manufacturability (DFM) and ESD laboratory practices.
  • Familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, Matlab, EMX and mixed-signal AMS simulation tools.

Education Requirements

Minimum qualifications specify degree-based experience equivalencies: BSEE with 12+ years, MS with 8+ years, or PhD with 5+ years of relevant experience, or equivalent practical experience. Field implied: Electrical Engineering or related technical discipline; equivalent experience accepted in lieu of a degree.


About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

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Date Posted: 2026-05-31