Senior Analog/Mixed-Signal IC Design Engineer — Acacia (Hybrid)

Job Title

Senior Analog/Mixed-Signal IC Design Engineer — Acacia (Hybrid)

Role Summary

Senior analog/mixed-signal IC design engineer on the Acacia mixed-signal IC team working on high-speed (≈25 Gb/s and above) and high-accuracy analog designs for optical transceivers used in data center, metro, and long-haul networks.

The role spans architecture, circuit design, layout, silicon measurement and productization, and cross-functional collaboration with digital/DSP, package, system, and module teams.

Experience Level

Senior-level. Candidates are expected to have substantial track record leading complex analog/mixed-signal IC projects; see Education Requirements for the degree-to-experience equivalency.

Responsibilities

Key responsibilities include designing and delivering high-speed analog/mixed-signal blocks for CMOS ASICs and ensuring successful integration into production systems.

• Architect, design, layout review, and productize ultra-deep-submicron CMOS analog/mixed-signal circuits.
• Lead design efforts for large, complex blocks; mentor engineers and track deliverables.
• Participate in peer reviews and establish solid design methodology from concept through production.
• Collaborate with packaging and hardware teams to meet signal- and power-integrity specifications.
• Plan and execute lab measurements, silicon bring-up, and characterization of high-speed circuits.
• Work with system, digital/DSP, package, and module teams to optimize ASIC integration and manufacturability.

Requirements

Core technical requirements and preferred skills.

Must have:

• Proven ability to design, simulate, and measure high-speed ICs in at least three of the following areas: serializers/deserializers, data converters, voltage regulators, output drivers, phase-locked loops, clock transmission/propagation, op amps, programmable-gain amplifiers, and equalization.
• Hands-on experience across schematic, simulation, layout review, and silicon validation for analog/mixed-signal designs intended for ASIC integration.
• Experience working with cross-functional teams to meet signal and power integrity requirements and integrate analog blocks into system-level products.
• Ability to lead technical design reviews and mentor junior engineers.

Nice to have / Preferred:

• Experience with electrical transceiver applications (backplane and cable communications) and high-frequency layout of passives (inductors, transformers, transmission lines).
• Experience with FinFET technologies and custom transistor-level layout.
• Floorplanning experience (power/ground, digital/analog routing) and design-for-manufacturability practices.
• ESD laboratory practices and mixed-signal simulation tools such as Cadence Virtuoso, Spectre/APS/SpectreX, Matlab, EMX, and AMS flows.

Education Requirements

Degree/experience matrix in posting: BSEE with 12+ years of relevant experience, or MS (in EE or related) with 8+ years, or PhD with 5+ years — OR equivalent practical experience. Fields referenced: Electrical Engineering / related technical fields. Equivalent industry experience will be considered.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).