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Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

Cisco Systems
July 01, 2026
Full-time
Remote friendly (San Jose, California, United States)
Worldwide
$191,400 - $281,400 USD yearly
ASIC Design Jobs, Level - Senior

Job Title

Senior Analog/mixed-signal IC Design Engineer - Acacia

Role Summary

Member of the mixed-signal IC design group developing high-speed (≥25 Gb/s) and high-accuracy analog circuits for optical transceivers used in data center, metro and long-haul telecommunication networks. The team collaborates with digital/DSP, system, package and module design groups.

This is a hybrid role requiring three days per week on-site at the San Jose, CA office. The role focuses on architecting, designing, laying out, measuring and productizing ultra-deep sub-micron CMOS analog/mixed-signal blocks for integration into complex ASICs.

Experience Level

Senior. Typical experience expectations vary by degree: PhD ≥5 years, MS ≥8 years, BS ≥12 years; generally candidates should have multiple years of senior-level analog/mixed-signal IC design experience.

Responsibilities

Deliver complex mixed-signal ASIC blocks from concept through production and coordinate across disciplines.

  • Architect, design, layout, characterize and productize ultra-deep sub-micron CMOS analog/mixed-signal circuits for transceivers.
  • Lead design efforts for large, complex chip blocks; mentor engineers and track deliverables.
  • Participate in peer reviews and define solid design methodologies from specification to production.
  • Collaborate with packaging and hardware teams to meet signal and power integrity requirements.
  • Develop high-speed AMS circuits and optimize performance, power and manufacturability.

Requirements

Core technical skills and hands-on experience required; preferred skills listed separately.

  • Must-have: Proven design, simulation and measurement experience with high-speed ICs in multiple areas such as high-speed serial links (SERDES), data converters, voltage regulators, output drivers, phase-locked loops (PLLs), clock transmission/propagation, op amps, programmable gain amplifiers, and equalization. (Candidates should demonstrate work across at least three of these areas.)
  • Must-have: Experience developing mixed-signal circuits for high-speed transceiver applications and taking blocks to production.
  • Nice-to-have: Experience with FinFET processes, high-frequency layout (passives, transmission lines, inductors, transformers), custom transistor layout, and floorplanning for mixed-signal designs.
  • Nice-to-have: Experience with design-for-manufacturability, ESD lab practices, and mixed-signal simulation flows (Cadence Virtuoso, Spectre/APS/SpectreX, AMS, Matlab, EMX).

Education Requirements

Degree options shown in the posting: B.S. in Electrical Engineering (BSEE) with ~12+ years of experience, M.S. with ~8+ years, or Ph.D. with ~5+ years; equivalent practical experience is acceptable. Fields implied include Electrical Engineering and related technical disciplines.


About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

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Date Posted: 2026-07-01