Senior Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)

Job Title

Senior Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)

Role Summary

Member of the Mixed-Signal IC design group developing high-speed and high-accuracy analog designs for optical transceiver products (100G, 400G, 1T). The team collaborates with digital/DSP, system, package and module groups to integrate AMS blocks into complex ASICs.

This hybrid role requires on-site presence three days per week in San Jose, CA to support design reviews, lab measurements and cross-functional integration.

Experience Level

Senior-level. Experience guidance from the posting: typical incumbents have 5+ years with a PhD, 8+ years with an MS, or 12+ years with a BSEE, or equivalent practical experience.

Responsibilities

The engineer will lead architecture, design, layout, verification and productization of advanced CMOS mixed-signal IC blocks for optical transceivers.

• Architect, design, layout and measure ultra-deep sub-micron CMOS analog/mixed-signal circuits and guide them into production.
• Lead a large block on a complex chip: set technical direction, track deliverables, and participate in peer reviews.
• Mentor junior team members and evangelize sound design methodology from conception through production.
• Collaborate with package and hardware teams to meet signal and power integrity requirements.
• Develop high-speed AMS circuits (serdes, equalization, PLLs, data converters) and ensure manufacturability and testability.

Requirements

Must-have technical experience and skills required to perform the role.

• Design, simulation and measurement experience with high-speed ICs across multiple areas; candidate must have experience in at least three of the following:
• High-speed serial links (serializers/deserializers, transceivers)
• Data converters
• Voltage regulators and power management
• Output drivers
• Phase locked loops (PLLs) and clock transmission/propagation
• Operational amplifiers and programmable gain amplifiers
• Equalization techniques
• Experience taking designs from concept to production, including measurement and validation in the lab.
• Ability to lead complex IC block development and provide technical mentorship.

Nice-to-have / preferred:

• Experience with electrical transceiver applications (backplane and cable communications) and FinFET technologies.
• High-frequency layout and passive component design (inductors, transformers, transmission lines).
• Floorplanning, custom transistor layout, design-for-manufacturability, and ESD lab practices.
• Familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, Matlab, EMX and mixed-signal AMS simulation flows.

Education Requirements

Posting specifies degree-based experience alternatives: BSEE with 12+ years experience; MS with 8+ years; PhD with 5+ years; or equivalent practical experience. Field cited: Electrical Engineering (or equivalent technical discipline).

Additional Information

Compensation: the posting lists a U.S./Canada starting salary range of $191,400 to $281,400 (annual) and higher ranges for certain locations. Benefits and paid time off are provided per Cisco policies.

Cisco is a global networking company; this role contributes to development of optical transceiver products used in data center and telecom networks.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).