Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

Job Title

Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

Role Summary

Senior mixed-signal IC design engineer on the Acacia team responsible for architecting, designing, laying out, measuring, and productizing ultra-deep-submicron CMOS analog/mixed-signal blocks for optical transceivers used in data center, metro, and long-haul networks.

The role leads large-block efforts, collaborates with digital/DSP, package, system and module teams, and drives designs from concept through production to meet signal and power integrity targets.

Experience Level

Senior-level. See Education Requirements for degree-based experience thresholds.

Responsibilities

Key responsibilities include architecture, design, verification, and production readiness of high-speed AMS IC blocks.

• Architect, design, layout, and productize ultra-deep-submicron CMOS analog/mixed-signal IP for optical transceivers.
• Lead design efforts for large blocks on complex chips; mentor team members and track deliverables.
• Perform circuit simulation, silicon bring-up, measurement, and characterization; participate in peer reviews.
• Collaborate with packaging, hardware, digital/DSP, and system teams to meet signal and power integrity specifications.
• Ensure designs are manufacturable and meet production test requirements.

Requirements

Must-have technical skills and experience. Degree requirements are summarized under Education Requirements below.

• Design, simulation, and measurement of high-speed ICs in at least three areas such as serializers/deserializers, data converters, voltage regulators, output drivers, PLLs, clock distribution/propagation, op amps, programmable gain amplifiers, and equalization.
• Hands-on experience with high-speed serial link architectures and transceiver design.
• Proficiency with Cadence Virtuoso and mixed-signal simulators (Spectre/APS/SpectreX) and practical mixed-signal simulation methodologies.
• High-frequency layout experience, including floorplanning (power/ground, signal routing) and custom transistor layout.
• Practical lab measurement experience and familiarity with ESD laboratory practices and silicon bring-up.
• Strong debugging and verification skills from prototype silicon to production qualification.

Nice-to-have:

• Experience with FinFET technology.
• Passive RF component design (inductors, transformers, transmission lines) and EM/field-solver experience.
• Experience with MATLAB and EMX tools.
• Experience designing for manufacturability and packaging integration.

Education Requirements

Minimums specified: BSEE with 12+ years' experience, or MS with 8+ years' experience, or PhD with 5+ years' experience, or equivalent practical experience.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).