Senior Analog/Mixed-Signal IC Design Engineer — Acacia

Job Title

Senior Analog/Mixed-Signal IC Design Engineer — Acacia

Role Summary

Lead the architecture, design, layout, measurement and productization of ultra-deep-submicron CMOS mixed-signal circuits for high-speed optical transceivers. Work within the Acacia mixed-signal IC design group and collaborate with digital/DSP, package, system and module teams to deliver products for 100G–400G–1T fiber-optic markets.

Experience Level

Senior — leadership role responsible for owning large blocks, mentoring engineers, and driving designs from concept to production. See Education Requirements for degree-to-experience equivalencies.

Responsibilities

Primary responsibilities include technical ownership, cross-team collaboration, and ensuring manufacturable designs.

• Architect, design, layout, measure and productize mixed-signal CMOS ICs for high-speed optical transceivers.
• Lead large-block design efforts, set technical direction, and mentor junior engineers.
• Participate in peer reviews and establish robust design methodologies from concept through production.
• Collaborate with packaging and hardware teams to meet signal integrity and power integrity targets.
• Develop and validate high-speed analog/mixed-signal circuits and subsystems (SERDES, data converters, PLLs, equalizers, amplifiers, regulators).

Requirements

Must-have technical skills and practical experience to perform the role; preferred items indicate advantageous background.

• Must-have: Demonstrated design, simulation and measurement experience of high-speed ICs across multiple areas such as serializers/deserializers (SERDES), data converters, PLLs, clock distribution/propagation, output drivers, voltage regulators, opamps, programmable gain amplifiers, and equalization. (Role requires competency in at least three of these areas.)
• Must-have: Hands-on experience with lab measurement, validation, and bringing designs to production.
• Nice-to-have: Experience with electrical transceiver applications (backplane/cable), FinFET technology, high-frequency layout and passive RF components (inductors, transformers, transmission lines).
• Nice-to-have: Floorplanning for mixed-signal chips, custom transistor layout, design-for-manufacturability (DFM) experience, and ESD lab practices.
• Nice-to-have: Familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, mixed-signal AMS simulations, Matlab, and EMX.

Education Requirements

Minimum qualifications specify degree-to-experience equivalencies: BSEE with 12+ years of experience, MS with 8+ years, or PhD with 5+ years — or equivalent practical experience. Field referenced: Electrical/Electronics or related technical disciplines.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).