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Senior Analog/Mixed-Signal IC Design Engineer - Acacia

Cisco Systems
June 15, 2026
Full-time
Remote friendly (San Jose, California, United States)
Worldwide
$191,400 - $281,400 USD yearly
VLSI Design Jobs, Level - Senior

Job Title

Senior Analog/Mixed-Signal IC Design Engineer - Acacia

Role Summary

Lead design and productization of high-speed analog and mixed-signal CMOS circuits for optical transceivers (100G–1T) in Acacia's mixed-signal IC team. The role covers architecture, design, layout, measurement and transfer to production while coordinating with digital/DSP, package, system and module teams.

Experience Level

Senior-level role. Typical experience aligns with the posted minimums (see Education Requirements) and substantial hands-on experience designing, simulating and measuring high-speed analog/mixed-signal ICs.

Responsibilities

Accountable for end-to-end delivery of complex mixed-signal blocks and mentoring team members.

  • Architect, design, layout, characterize and productize ultra-deep-submicron CMOS analog/mixed-signal blocks.
  • Lead a large block on complex chips: set methodology, track deliverables, conduct and participate in peer design reviews.
  • Collaborate with package, hardware and system teams to meet signal and power integrity requirements.
  • Develop and optimize high-speed AMS circuits (serdes, PLLs, data converters, amplifiers, equalization) for transceiver applications.
  • Support lab validation, measurement campaigns, and handoff for manufacturing and test.

Requirements

Must-have technical experience and demonstrable hands-on skills; listed items reflect core expectations. Degree and years guidance are in Education Requirements below.

  • Proven design, simulation and measurement experience for high-speed ICs across multiple areas such as serializers/deserializers, data converters, voltage regulators, output drivers, PLLs, clock distribution, op amps, programmable gain amplifiers, and equalization.
  • Experience with high-speed serial link architectures and transceiver design (backplane/cable communications is a plus).
  • Strong analog/mixed-signal verification and measurement skills; ability to lead lab characterization and debug.
  • Practical experience in layout, floorplanning (power/ground, digital/analog separation) and design-for-manufacturability.
  • Nice-to-have: FinFET technology experience, high-frequency passive/component layout (inductors, transmission lines), custom transistor layout, ESD lab methodology, and mixed-signal simulation tools (Cadence Virtuoso, Spectre/APS/SpectreX, Matlab, EMX).

Education Requirements

Minimums posted by the employer: BSEE with 12+ years of relevant experience, or MS (electrical engineering or related) with 8+ years, or PhD with 5+ years β€” or equivalent practical experience. Degrees in Electrical Engineering or closely related technical fields are referenced; equivalent professional experience is acceptable.


About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

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Date Posted: 2026-06-15