Senior Analog/Mixed-Signal IC Design Engineer, Acacia

Job Title

Senior Analog/Mixed-Signal IC Design Engineer — Acacia

Role Summary

Lead design, layout, characterization and productization of ultra-deep sub-micron CMOS analog and mixed-signal circuits for high-speed optical transceivers (100G, 400G, 1T). Work within the mixed-signal IC design group and coordinate with digital/DSP, system, package and module teams to integrate AMS blocks into complex ASICs.

This is a hybrid role requiring three days per week in the San Jose, CA office.

Experience Level

Senior-level. See Education Requirements for specific experience thresholds and degree-equivalent guidance.

Responsibilities

The role combines hands-on circuit work, block leadership, and cross-functional integration.

• Architect, design, layout, characterize and productize analog and mixed-signal CMOS blocks for optical transceivers.
• Lead a large block on complex chips: define interfaces, schedule and deliverables; perform peer reviews; mentor junior engineers.
• Collaborate with package, hardware and system teams to meet signal and power integrity and ESD requirements.
• Develop high-speed circuits (serial links, serializers/deserializers, data converters, PLLs, clock distribution, output drivers, op-amps, PGAs, equalizers) and integrate them into ASIC floorplans.
• Support lab characterization, measurement, debugging and release-to-production activities.
• Ensure designs meet manufacturability and testability requirements.

Requirements

Must-have technical skills and practical experience for immediate contribution.

• Proven track record designing, simulating and measuring high-speed analog/mixed-signal ICs across multiple functional areas (serial links, data converters, PLLs, regulators, drivers, amplifiers, clock transmission/propagation, equalizers).
• Hands-on mixed-signal simulation and verification experience; familiarity with Cadence Virtuoso and Spectre/APS/SpectreX or equivalent flows.
• High-frequency/custom transistor layout experience and floorplanning for analog/digital partitioning and power/ground distribution.
• Experience with signal and power integrity analysis and implementing ESD laboratory practices.
• Experience supporting lab bring-up, debugging and correlation between simulation and measured silicon.
• Strong mentoring, communication and project execution skills.

Nice-to-have:

• Experience with electrical transceiver applications (backplane and cable communications).
• Experience with FinFET technologies and passive high-frequency components (inductors, transformers, transmission lines).
• Experience with Matlab, EMX and mixed-signal AMS simulation toolchains.
• Design-for-manufacturability and advanced packaging integration experience.

Education Requirements

Degree and experience options: B.S. in Electrical Engineering (or related technical field) with ~12+ years' relevant experience, M.S. with ~8+ years, or Ph.D. with ~5+ years, or equivalent practical experience. The posting explicitly allows equivalent experience in lieu of degree attainment.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).