Senior Analog/Mixed-Signal IC Design Engineer - Acacia

Job Title

Senior Analog/Mixed-Signal IC Design Engineer - Acacia

Role Summary

Senior engineer on the Mixed-Signal IC design team developing high-speed, high-accuracy analog circuits for optical transceivers (100G–1T). The role covers architecture, design, layout, measurement and productization of advanced CMOS ICs to be integrated into ASICs.

This is a hybrid role requiring three days per week at the San Jose, CA office.

Experience Level

Senior-level. Typical experience: BSEE + ~12 years, MS + ~8 years, or PhD + ~5 years (or equivalent practical experience). See Education Requirements for degree details.

Responsibilities

Core responsibilities include delivering complex analog/mixed-signal blocks from concept to production and collaborating across disciplines.

• Architect, design, layout, measure, and productize ultra-deep-submicron CMOS analog/mixed-signal ICs for optical communications.
• Lead design efforts for large blocks on complex chips; track deliverables and milestones.
• Mentor and review work of other engineers; participate in peer reviews and enforce design methodology.
• Collaborate with digital/DSP, package, hardware, and system teams to meet signal and power integrity requirements.
• Ensure designs meet manufacturability and ESD/test requirements through tapeout and production handoff.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Proven track record designing, simulating, and measuring high-speed analog/mixed-signal ICs across multiple areas (at least three): serializers/deserializers (SERDES), data converters, PLLs, clock transmission/propagation, output drivers, voltage regulators, op-amps, programmable gain amplifiers, and equalization.
• Hands-on experience with schematic-level design, layout, and lab measurement of high-speed circuits and subsystems.
• Experience leading complex IC designs and coordinating cross-functional delivery (system, package, board).
• Strong understanding of signal and power integrity for high-speed transceivers.
• Excellent problem solving, documentation, and peer-review skills.

Preferred:

• Experience with electrical transceiver applications (backplane and cable communications) and high-frequency passive/component design (inductors, transformers, transmission lines).
• Experience with FinFET technology and custom transistor layout.
• Floorplanning experience (power/ground, digital/analog routing) and design-for-manufacturability expertise.
• Familiarity with ESD lab practices and mixed-signal simulation tools (Cadence Virtuoso, Spectre/APS/SpectreX, EMX, MATLAB).

Education Requirements

Degrees specified in the posting: BSEE with ~12+ years of experience; MS (in relevant technical field) with ~8+ years; PhD with ~5+ years; or equivalent practical experience. Fields referenced include Electrical Engineering and related technical areas. No required certifications were listed.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).