Senior Analog/mixed-signal IC Design Engineer - Acacia

Job Title

Senior Analog/mixed-signal IC Design Engineer - Acacia

Role Summary

Lead architect and designer of high-speed analog and mixed-signal CMOS IC blocks for optical transceivers used in data-center and telecom networks. Work on ultra-deep-submicron CMOS products from concept through production, collaborating with digital/DSP, package, system and module teams.

This is a hybrid role with three days per week onsite at the San Jose, CA office.

Experience Level

Senior — see Education Requirements for degree-specific experience guidance (examples: BSEE with 12+ years, MS with 8+ years, PhD with 5+ years, or equivalent experience).

Responsibilities

Primary accountabilities include architecture, design, verification, and productization of high-speed AMS ICs and leadership of complex chip blocks.

• Architect, design, layout review, characterize and productize CMOS analog/mixed-signal ICs.
• Lead design efforts for large/complex blocks, mentor engineers, track deliverables and participate in peer reviews.
• Collaborate with packaging and hardware teams to meet signal and power integrity requirements.
• Develop high-speed AMS circuits (serial links, data converters, PLLs, equalizers, etc.) and drive designs into production.
• Define and apply design methodology from conception through manufacturing and test.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Proven design, simulation and measurement experience with high-speed ICs — experience in at least three of the following domains is required:
• High-speed serial links: serializers/deserializers, data converters
• Voltage regulators and output drivers
• Phase-locked loops (PLLs), clock transmission and propagation
• Operational amplifiers, programmable gain amplifiers, and equalization circuits
• Hands-on experience with analog/mixed-signal verification and measurement in silicon.
• Strong understanding of signal and power integrity for mixed-signal systems and ability to work with package/module teams.
• Experience taking designs from definition through silicon bring-up and production release.
• Excellent problem-solving, documentation, and design review skills; ability to lead design reviews and mentor junior engineers.
• Nice-to-have: experience with Cadence Virtuoso, Spectre/APS/SpectreX, Matlab, EMX and mixed-signal AMS simulation flows.
• Nice-to-have: high-frequency layout, passive component design (inductors, transformers, transmission lines), floorplanning, custom transistor layout, DFM practices, ESD lab methodology, and FinFET experience.

Education Requirements

Degree-based guidance: BSEE with 12+ years of relevant experience, or MS (electrical/related engineering) with 8+ years, or PhD with 5+ years, or equivalent practical experience. No specific certifications were required; equivalent experience is acceptable as stated.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).