Senior Analog/Mixed-Signal ASIC Design Engineer

Job Title

Senior Analog/Mixed-Signal ASIC Design Engineer

Role Summary

Senior engineer in the Silicon Architecture group responsible for leading analog and mixed-signal ASIC design from concept through implementation, verification, test, and delivery. Work involves architectural concept development, circuit-level design, and coordinating across analog and digital design teams.

Work supports national-security projects and requires collaboration with multidisciplinary teams; the role may include chip-lead responsibilities and participation in proposal and customer-facing technical activities.

Experience Level

Level: Senior. Typical experience: 5–7 years with a bachelor's degree, 3–5 years with a master's degree, or 0–2 years with a PhD in ASIC hardware engineering or a related field.

Responsibilities

Primary duties include architecture, circuit design, verification inputs, and chip-level planning.

• Define top-level and block-level ASIC requirements from customer needs.
• Design and simulate transistor-level analog/mixed-signal circuits; verify with extracted parasitics.
• Develop conceptual circuit designs and conduct system-level design trades for performance, power, and cost.
• Review and mentor detailed block-level implementations; guide physical layout and floor-planning.
• Provide inputs to verification and test planning; support chip integration and tape-out activities.
• Evaluate hardware feasibility of algorithms and translate requirements into implementable designs.
• Independently drive solutions when requirements are unclear and adapt to changing requirements.
• Contribute to proposal and business-development technical content and mentor junior engineers on best practices.

Requirements

Expect candidates to demonstrate substantial analog/mixed-signal ASIC design experience, technical leadership, and strong engineering fundamentals.

• Must-have: Significant analog/mixed-signal ASIC design experience (transistor-level design and simulation), ability to produce detailed design specifications, and strong analytical and problem-solving skills.
• Must-have: Experience with circuit-level simulation including use of extracted parasitics and familiarity with verification/test planning for ASICs.
• Must-have: Proven ability to lead or coordinate small multidisciplinary design teams and communicate effectively in writing and verbally.
• Must-have: Ability to obtain and maintain a U.S. government security clearance (required for selected applicants).
• Nice-to-have: Proficiency with Cadence Virtuoso or equivalent mixed-signal tools; experience with SystemVerilog/Verilog-AMS or SV-RNM for high-level modeling and verification.
• Nice-to-have: Scripting skills (Python, SKILL) to automate design, verification, and test flows; prior participation in tape-outs.

Education Requirements

Requires a bachelor's degree in Engineering or a related field; a master's degree is preferred. Candidates with a PhD are considered with reduced experience expectations. Related technical degrees in electrical engineering, computer engineering, physics, or similar fields are acceptable; equivalent practical experience may be considered where appropriate.

About the Company

Company: Draper

Headquarters: Cambridge, MA, United States

Draper is an independent, nonprofit research and development organization based in Cambridge, Massachusetts. With over 2,000 employees, Draper develops advanced technologies in defense, space, biomedical engineering, and other national-security and commercial domains through multidisciplinary teams of engineers and scientists.