Senior Analog Design Engineer

Job Title

Senior Analog Design Engineer

Role Summary

Lead analog and mixed-signal IC design efforts for high-performance products, owning architecture, circuit design, simulation, and silicon validation. Work within a multi-site engineering organization and provide technical mentorship to junior engineers.

This role focuses on delivering robust analog blocks (ADCs, DACs, PLLs, LDOs, amplifiers, high-speed interfaces) using advanced CMOS processes and industry-standard verification flows.

Experience Level

Senior — minimum 7 years of relevant analog/mixed-signal IC design experience.

Responsibilities

Primary responsibilities include hands-on design, verification, and coordination across disciplines:

• Define architecture and perform circuit design, simulation, and verification for analog and mixed-signal blocks (ADCs, DACs, PLLs, LDOs, amplifiers, interfaces).
• Perform detailed simulations across operating conditions and process corners using Spectre, Eldo, or equivalent tools.
• Supervise layout activities and coordinate post-layout verification (LVS, DRC, parasitic extraction).
• Develop test plans and support silicon bring-up, validation, and characterization.
• Analyze and debug silicon issues; propose and implement corrective actions.
• Collaborate with digital design, layout, test, and system teams throughout the product lifecycle.
• Lead design reviews, produce technical documentation, and contribute to patent disclosures where applicable.
• Mentor and provide technical guidance to junior analog engineers.

Requirements

Must-have technical skills and experience; a concise separation of required vs nice-to-have items.

• Must-have: Extensive hands-on analog/mixed-signal IC design experience using advanced CMOS technologies (examples: 28nm, 16nm, 7nm).
• Must-have: Strong proficiency with industry EDA tools (Cadence Virtuoso, Spectre, AMS simulation or equivalent).
• Must-have: Deep understanding of analog circuit topologies, semiconductor device physics, process variation, and yield-related considerations.
• Must-have: Experience with layout supervision and post-layout verification flows (LVS, DRC, parasitic extraction) and silicon validation.
• Must-have: Proven problem-solving and debugging skills; ability to analyze silicon failures and implement fixes.
• Must-have: Ability to work independently and within multi-site, multi-cultural teams; strong English communication and presentation skills.
• Nice-to-have: Experience with scripting languages such as Python or Perl.

Education Requirements

Master's degree or Ph.D. in Electrical Engineering or a closely related technical field (as stated in the posting).

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.