Senior AI Architect - Semiconductor Yield & Process Control

Job Title

Senior AI Architect - Semiconductor Yield & Process Control

Role Summary

Design and deploy AI and data solutions to improve wafer fabrication yield through automated root-cause analysis and process optimization. Work within the Texas Fab Yield Enhancement and Control Systems team to deliver production-grade platforms integrated with manufacturing systems.

Experience Level

Senior. Typically requires 5+ years in semiconductor manufacturing, process engineering, or fab data systems; advanced degrees may reduce the years-of-experience expectation.

Responsibilities

Lead architecture, development, and deployment of AI-driven yield and process control systems.

• Architect and implement AI/data solutions for automated root-cause analysis of yield excursions and process drift.
• Design statistical correlation engines linking process parameters, metrology data, and electrical test results across fabrication steps.
• Develop and maintain ML solutions for anomaly detection and process control enhancement (time-series, causal inference).
• Integrate solutions with manufacturing systems and data platforms in collaboration with IT.
• Lead cross-functional teams (Yield, Process, Equipment, Manufacturing, IT) to build and deploy production software applications.
• Define and help manage site data architecture strategies for production impact and scalability.

Requirements

Core qualifications and practical experience required for the role.

• 5+ years in semiconductor manufacturing, process engineering, or fab data systems (may be reduced for advanced degrees).
• Expertise in statistical correlation methods applied to manufacturing data (multivariate analysis, PCA, partial correlation, Granger causality).
• Strong software engineering skills: Python, SQL, Spark/PySpark, and Git; experience producing production-quality code.
• Demonstrated experience designing AI architectures and applying ML techniques (supervised/unsupervised learning, time-series analysis, Bayesian methods, causal inference).
• Familiarity with yield management concepts: bin pareto, wafer maps, lot genealogy, split-lot analysis, inline-to-final correlation.
• Ability to lead cross-functional teams and collaborate with IT for system integration and deployment.
• Position is not eligible for visa sponsorship by the company.
• Nice-to-have: SPC/FDC/APC experience, MES/EMS and SECS/GEM knowledge, advanced data engineering and storage experience, hands-on semiconductor process experience, familiarity with LLM frameworks.

Education Requirements

BS, MS, or PhD in Electrical Engineering, Materials Science, Computer Science, or a related field - or equivalent industry experience. The posting states advanced degrees (MS/PhD) may allow consideration with fewer years of industry experience.

About the Company

Company: Qorvo

Headquarters: Greensboro, NC, US

Qorvo supplies innovative semiconductor solutions that enhance connectivity and power for a variety of applications, including consumer electronics, automotive, and healthcare. With a focus on RF and power solutions, Qorvo combines technology leadership and global manufacturing to address complex challenges in fast-growing industries. Their commitment to excellence and innovation drives them to shape the future of wireless communications.