Semiconductor Package Design Engineer

Job Title

Semiconductor Package Design Engineer

Role Summary

Design advanced semiconductor packages (ceramic and organic substrates) including layout, parasitic extraction, and optimization. Collaborate with IC design, system, SI/PI, thermal, and SoC teams to define package requirements and optimize die floorplan, bump patterns, and interposer/substrate stack-ups.

Experience Level

Senior-level - 8 to 10 years of experience in semiconductor packaging design, modeling, and simulation.

Responsibilities

Primary technical and coordination responsibilities for package deliverables:

• Develop package layouts for interposers and substrates using standard CAD tools.
• Extract package parasitics and perform signal integrity (SI) and power integrity (PI) analysis.
• Optimize package and die floorplan, bump patterns, and substrate/interposer stack-ups with SoC and IC teams.
• Work with SI/PI and thermal engineering teams to validate package performance.
• Prepare documentation and release designs into the archival system.
• Engage cross-functional teams to align package requirements with system and IC constraints.

Requirements

Must-have technical skills and experience; nice-to-have items listed separately.

• Must-have: 8+ years experience in semiconductor packaging design, modeling, and simulation; strong experience with interposer and substrate layouts and advanced package technologies (2.5D/3D).
• Must-have: Proficiency with Cadence Allegro Package Designer Plus (APD+) for package layout and artwork generation.
• Must-have: Experience using SI/PI tools for package-level extraction and simulation and applying results to package optimization.
• Must-have: Proven ability to work with IC/SoC teams on floorplan and bump optimization and to translate IC requirements into package specifications.
• Nice-to-have: Experience with Sigrity Advanced SI/PI toolsets (parallel buses and serial links) and familiarity with RF/microwave tools (AWR, Momentum, HFSS) for EM/circuit/system simulation.
• Nice-to-have: Background in RF/microwave package design and EM simulation workflow integration.
• Strong problem-solving, written and verbal communication, organization, and self-motivation; track record of success in cross-functional teams.

Education Requirements

Bachelor's degree in Electrical Engineering, Mechanical Engineering, or another semiconductor-packaging-related discipline.

About the Company

Company: Micross

Micross provides microelectronic packaging, engineering, assembly, testing and supply-chain services for advanced semiconductor and electronic components. They support custom package design, interposers, substrates, and related solutions for aerospace, defense and commercial markets.