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SDC, Synthesis and STA Engineer

Advanced Micro Devices
September 02, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Physical Design Jobs, Level - Senior

Job Title

SDC, Synthesis and STA Engineer

Role Summary

Owner of SDC/constraints development and front-end implementation tasks for IPs, subsystems, and SoCs. Responsible for SDC generation, verification, promotion/demotion, equivalence checking and driving timing closure through collaboration with designers and PNR teams.

Experience Level

Senior — typically 7+ years of industry experience. See Education Requirements for the specific degree-plus-experience combinations listed in the posting.

Responsibilities

Primary responsibilities focus on SDC and timing closure across IP and SoC projects. Work involves hands-on development, verification, and coordination with implementation teams.

  • Own and develop timing constraints (SDC) for IPs, subsystems, and SoCs.
  • Generate, verify, promote/demote, and perform equivalence checking of SDCs using third-party or in-house tools.
  • Perform front‑end implementation tasks as needed: synthesis, LEC, CLP, pre‑layout STA and post‑layout STA/timing closure.
  • Collaborate with RTL designers, place & route (PNR) teams, and verification engineers to achieve timing closure on schedule.
  • Estimate durations, plan work, and deliver quality synthesis and timing closure results.
  • Debug and resolve technical issues; guide and mentor team members on technical matters.

Requirements

Must-have technical skills and experience for day-one effectiveness, followed by preferred skills.

  • Proven experience owning SDC/constraints development and SDC verification workflows.
  • Hands-on experience with synthesis flows and timing closure methodologies (pre/post‑layout STA).
  • Experience with LEC, CLP, and equivalence checking processes.
  • Ability to collaborate with RTL designers and PNR teams to drive closure and resolve issues.
  • Strong debug skills for timing and synthesis-related problems.
  • Nice-to-have: experience with lint, CDC, RTL & netlist-based static checks.
  • Nice-to-have: top-level or SoC-level experience, handling complex designs, high-frequency clocks, and complex clocking schemes.
  • Nice-to-have: understanding of low-power timing impacts, DFT concepts, scripting, and automation.

Education Requirements

Bachelor's degree with 8 years of experience OR Master's degree with 6 years of experience in Electrical Engineering.


About the Company

Company: Advanced Micro Devices

Headquarters: Sunnyvale, California, USA

Advanced Micro Devices, or AMD, is a global semiconductor company that designs and manufactures microprocessors, graphics processors, and related technologies for a variety of computing devices. Known for pushing the boundaries of innovation, AMD's mission is to deliver high-performance computing solutions for AI, data centers, gaming, and embedded applications. They foster a collaborative, inclusive culture focused on creativity and problem-solving, aiming to drive progress and excellence in technology.

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Date Posted: 2026-09-01