RTL Design - Staff Engineer

Job Title

RTL Design - Staff Engineer

Role Summary

Design and implement RTL for complex SoC blocks, drive micro-architecture decisions, and deliver timing- and power-optimized silicon-ready IP. The role works within the hardware engineering/ASIC design team and collaborates closely with verification, validation, floorplanning, and back-end teams.

Experience Level

Senior-level role. Qualcomm prefers candidates with approximately 10+ years of relevant hardware/RTL/SoC experience.

Responsibilities

Accountable for RTL design, integration, and silicon readiness across assigned blocks.

• Develop micro-architecture and write RTL (Verilog/SystemVerilog) for complex SoC subsystems.
• Integrate IP into SoC-level designs and work with system architects and floorplan teams.
• Create timing constraints and drive timing closure with synthesis and static-timing tools.
• Design and validate multi-clock and asynchronous interfaces; manage clocking/reset architecture.
• Collaborate with verification, validation, and bring-up teams for pre- and post-silicon debug.
• Implement low-power design techniques and collaborate on power intent and closure.
• Use ASIC development tools for linting, CDC checks, synthesis, and timing analysis.

Requirements

Technical skills and experience required for immediate contribution.

Must-have:

• Proven RTL design and micro-architecture experience; hands-on Verilog/SystemVerilog coding.
• SoC design and integration experience for complex chips.
• Familiarity with AMBA protocols (AXI, AHB, APB) and SoC clock/reset/debug architectures.
• Experience with constraint development, synthesis, and timing-closure methodologies.
• Experience with multi-clock designs and asynchronous interfaces.
• Practical experience using ASIC tools such as lint, CDC verification tools, Design Compiler and PrimeTime.
• Experience in low-power SoC design.

Nice-to-have:

• Knowledge of peripherals such as USB, PCIe, SDCC.
• Experience with memory-controller design and microprocessor interfacing.
• Experience working on pad ring design and chip-level floorplanning.

Education Requirements

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related engineering field (typically paired with 4+ years' relevant experience); or Master's degree in a related field (typically 3+ years' relevant experience); or PhD in a related field (typically 2+ years' relevant experience). The posting also indicates a preference for candidates with ~10+ years of experience overall. Equivalent practical experience considered where stated.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.