RTL Design (NoC/Interconnect) - Staff

Job Title

RTL Design (NoC/Interconnect) - Staff

Role Summary

Design and architect Network-on-Chip (NoC) and interconnect fabrics for next-generation SoCs used in smartphones, notebooks, smart glasses, tablets and related products. The role covers specification, micro-architecture, RTL design and verification of coherent and non-coherent interconnect IP.

The position works within the HDC infrastructure (NoC/Interconnect) core team and partners closely with SoC architecture, performance, verification, physical design, floorplanning and silicon validation teams.

Experience Level

Senior — typically requires about 8–12 years of experience in IP/SoC design and verification (experience expectations listed in posting).

Responsibilities

Key responsibilities include:

• Design next-generation coherent and non-coherent interconnect fabrics.
• Define specifications, micro-architecture and RTL for interconnect and related IPs.
• Develop and verify Verilog RTL; own design-for-verification activities.
• Collaborate with SoC architecture, core teams, performance and physical design teams to meet performance and timing targets.
• Coordinate with silicon validation to correlate pre-silicon assumptions with post-silicon results.
• Micro-architect debug hooks and infrastructure in NoC to aid silicon root-cause analysis.
• Manage SoC front-end dependencies, plan and track design tasks, and drive project milestones across design, verification and physical implementation.

Requirements

Must-have technical skills and experience:

• 8–12 years of solid experience in IP/SoC design and verification.
• Strong understanding of interconnect protocols and NoC concepts (e.g., CHI, AHB, AXI, ACE, ACE-Lite).
• Hands-on RTL development and verification; experience with Verilog RTL coding.
• Familiarity with multi-core ARMv8/v9 CPU architecture, cache coherency protocols and virtualization.
• Practical knowledge of synthesis and timing closure flows (Synopsys DC/DCG), DFT, formal verification and silicon debug.
• Experience with static checks and flows such as lint, CDC, PLDRC and CLP.
• Proven ability to manage cross-team dependencies, communicate effectively, and provide technical leadership.

Education Requirements

Degree and experience options listed: Bachelor's degree in Computer Science, Electrical/Electronics Engineering or related field with 4+ years of hardware engineering experience; OR Master's degree in the same fields with 3+ years of hardware engineering experience; OR PhD in the same fields with 2+ years of hardware engineering experience.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.