RTL Design Engineer, Sr Staff
QualcommJob Title
RTL Design Engineer, Sr Staff
Role Summary
Senior RTL design engineer in the connectivity networking SoC team responsible for microarchitecture, RTL implementation, integration, verification support and tapeout readiness for high-performance SoC products targeting AI datacenter connectivity.
Work includes block/subsystem RTL coding, coordination with verification, physical design and software teams, and driving design quality and timing/power targets.
Experience Level
Senior — role titled Sr Staff. Experience guidance noted in qualifications: typically multi-year ASIC/SoC design experience (see Education Requirements for formal years guidance).
Responsibilities
Primary responsibilities include:
- Microarchitecture and RTL design for SoC subsystems and IP blocks (Verilog/VHDL).
- Create microarchitecture and hardware documentation for blocks and subsystems.
- Develop UPF and run CLP checks; author synthesis constraints for blocks and subsystems.
- Perform RTL quality checks including lint, CDC checks, and equivalence checks (LEC).
- Collaborate with verification, physical design, software and FPGA teams to meet area, power and performance targets and ensure successful tapeout.
- Analyze, debug and fix issues reported by verification and post-silicon teams; support post-silicon bring-up.
- Review and sign off on verification plans, DFT and physical design implementation as part of integration activities.
Requirements
Must-have technical skills and experience:
- Proven RTL SoC design experience across multiple projects using Verilog or VHDL.
- ASIC/FPGA bring-up and debug methodologies; experience with post-silicon debug.
- Synthesis experience (Design Compiler) and ability to create synthesis constraints.
- Familiarity with formal verification flows (LEC) and ability to review test plans and coverage metrics.
- Strong understanding of timing closure and interactions with physical design teams.
- Experience with RTL quality flows: lint, CDC, LEC/formal equivalence.
- Strong communication and teamwork; ability to lead technical reviews and coordinate cross-functional workstreams.
- Nice-to-have: SerDes PHY, DSP, analog mixed-signal experience; knowledge of Ethernet, PCIe, memory controllers, microprocessor interfaces, chip I/O and packaging.
Education Requirements
Posting specifies one of: Bachelor's degree in Science, Engineering or related field with ~6+ years ASIC design/verification experience; or Master's degree with ~5+ years; or PhD with ~4+ years. Fields: science, engineering or related technical disciplines. The posting also allows equivalent practical experience in lieu of degree.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
