RTL Design Engineer

Job Title

RTL Design Engineer

Role Summary

Design and verify RTL blocks for AI/ML ASICs, working closely with microarchitecture and verification teams. Ensure blocks meet functional, timing, area, and power targets for high-performance machine-learning accelerators.

Experience Level

Mid-level — expects at least 5 years of RTL development experience.

Responsibilities

Core responsibilities include implementing RTL blocks, verifying correctness, and collaborating with architecture and synthesis teams.

• Design and implement RTL for digital blocks, including floating-point/math operators.
• Develop and execute design verification strategies and write testbenches.
• Collaborate with microarchitecture (uArch) team to meet timing, area, and functional goals.
• Perform synthesis-aware design and work with synthesis tools to meet constraints.
• Debug RTL issues, run simulations, and support timing closure activities.
• Optimize blocks for performance, area, and power in high-speed digital designs.
• Learn and adapt designs to support transformer-based and other ML model architectures as required.

Requirements

Must-have technical skills and experience, plus a short list of desirable additions.

• Must-have: Minimum 5 years of RTL development experience.
• Experience with high-speed digital logic and standard RTL design and synthesis tools.
• Familiarity with verification methodologies and writing testbenches.
• Ability to learn modern ML architectures (e.g., transformers) quickly and work autonomously.
• Willingness to start promptly and work in a fast-paced environment.
• Nice-to-have: Experience with PCIe, Ethernet, or HBM; familiarity with transformer models and numerical representations; scripting ability in Python or similar.

Education Requirements

Not specified.

About the Company

Company: Ethan Alexander Group

Recruitment agency that advertises technical and engineering job opportunities, including roles in semiconductor design, RTL engineering, and AI hardware.