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RTL Design Engineer

SARACA
October 13, 2026
Contract
On-site
Santa Clara, California, United States
RTL Design Jobs, Level - Senior

Job Title

RTL Design Engineer

Role Summary

This is an on-site contract role based in Santa Clara, CA to design digital logic for ASIC/SoC projects. The engineer will implement RTL using hardware description languages and work across architecture, verification, and physical design teams to deliver functionally correct, high-performance, and power-optimized designs.

Experience Level

Senior - requires 7+ years of Logic/RTL design experience.

Responsibilities

The engineer will develop RTL, ensure design quality, and support integration and verification activities.

  • Develop modular, reusable RTL in Verilog/SystemVerilog/VHDL following specifications from system architects.
  • Perform synthesis, linting, CDC checks, static timing analysis (STA), and other static checks.
  • Collaborate with verification teams to support testbench development, debug issues, and close functional bugs.
  • Optimize designs for timing, area, power, and reliability; work with UPF/CPF flows for low-power when applicable.
  • Participate in design reviews and document design features, constraints, and implementation details.
  • Coordinate with physical design, DFT, and integration teams during RTL handoff and integration.
  • Contribute to continuous improvement of RTL design methodologies and workflows.

Requirements

Key technical requirements and preferred skills.

Must-have:

  • 7+ years of Logic/RTL design experience.
  • Strong experience with Verilog, SystemVerilog, and/or VHDL.
  • Solid VLSI/ASIC/SoC design fundamentals.
  • Experience with lint tools, CDC analysis, SpyGlass, synthesis flows, and STA.
  • Strong scripting skills (Python, TCL, or Perl).

Nice-to-have:

  • Experience with peripheral IP: GPIO, UART, SPI, I2C, JTAG.
  • Familiarity with bus protocols: AMBA/OCP; interfaces such as PCIe, USB, Ethernet, JESD204C.
  • DFT concepts and collaboration with physical design teams.
  • Experience with UPF/CPF and low-power design techniques.
  • RTL integration experience and cross-team collaboration for physical implementation.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.


About the Company

Company: SARACA

SARACA appears to be a recruiting or staffing organization advertising an RTL Design Engineer contract role in Santa Clara, CA, specializing in technical placements for engineering and semiconductor positions.

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Date Posted: 2026-10-09