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RTL Design Engineer

Synopsys
October 2, 2026
Full-time
On-site
Boxborough, Massachusetts, United States
$138,000 - $208,000 USD yearly
RTL Design Jobs, Level - Senior

Job Title

RTL Design Engineer

Role Summary

Senior digital design engineer responsible for architecting and implementing high-performance PHY, DDRIO, and UCIe-related RTL for ASIC/SoC products. The role works closely with verification, physical design, and system teams to deliver production silicon.

Experience Level

Senior-level. Typical expectation: BS in a related engineering field with 12+ years experience, or MS with 10+ years experience.

Responsibilities

The engineer will lead RTL architecture and implementation across the ASIC development lifecycle and collaborate with cross-functional teams to meet performance, power, area, and schedule targets.

  • Architect, design, and implement RTL for PHY, DDRIO, UCIe, and related high-speed interfaces.
  • Define RTL architecture and interfaces; coordinate with verification, physical design, and system teams.
  • Drive chip- and block-level design activities through architecture, implementation, and handoff.
  • Optimize designs for performance, power, area (PPA), and product scalability.
  • Develop and evaluate complex physical IP solutions, including SERDES and DDR subsystems.
  • Perform design reviews, debug hardware issues, and mentor junior engineers.
  • Collaborate with cross-functional teams to deliver silicon on schedule.

Requirements

Key must-have technical skills and experience for successful performance in the role.

Must-have:

  • Proven ASIC RTL design and digital logic development experience.
  • Deep expertise in PHY design and high-speed interface technologies (DDRIO, UCIe, SERDES).
  • Solid understanding of the full SoC design cycle from architecture through implementation.
  • Experience with design verification methodologies and hardware debugging.
  • Strong analytical and problem-solving skills; effective written and verbal communication.

Nice-to-have:

  • Experience developing complex IP for advanced process technologies.
  • Familiarity with low-power design techniques and complex clocking architectures.
  • Experience mentoring engineers and leading technical projects.
  • Knowledge of industry-standard EDA tools and design methodologies.

Education Requirements

BS in Electrical Engineering, Computer Engineering, or a related field with 12+ years of relevant experience, or MS in a related field with 10+ years of relevant experience. Specific certifications were not listed.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-09-29