RTL Design Engineer

Job Title

RTL Design Engineer

Role Summary

Work on block-level RTL and subsystem integration for Security IP (SECIP) used across AMD SoC products (client, server, graphics, embedded). The role focuses on designing synthesizable RTL, specifying micro-architecture and features, and collaborating with verification, integration, and post-silicon teams to deliver production-quality IP.

Experience Level

Mid-level. The posting does not specify required years of experience but expects engineers with practical RTL design and verification experience and the ability to take technical ownership.

Responsibilities

Primary responsibilities include implementation, verification support, and cross-team problem resolution for block and subsystem IP.

• Develop and maintain feature specs, micro-architecture, and synthesizable RTL for block-level IP and MP subsystems.
• Implement and debug RTL using C-DPI directed tests and verification team testbenches to achieve feature closure and coverage goals.
• Triage regressions, debug simulations, analyze coverage, and resolve issues with design, verification, and integration teams.
• Contribute to verification testbench and test plan specifications; influence testbench architecture for design-for-verification.
• Debug and resolve SoC integration and post-silicon validation issues.
• Provide technical leadership on IP functionality, design methodology, and critical problem resolution.

Requirements

Must-have technical skills and practical competencies for successful performance in the role.

• Proven RTL design experience using Verilog; SystemVerilog is an asset.
• Strong knowledge of RTL design and verification methodology and best practices, including C-DPI test design.
• Experience with standard on-chip protocols (AXI, AHB, AMBA) and datapath/accelerator microarchitecture concepts.
• Hands-on experience with ASIC design tools: synthesis, linting, simulation, debugging, and power-aware simulation workflows.
• Proficiency in scripting for flow automation and tests (Tcl, Python, Perl, Ruby, Makefile, or similar).
• Ability to triage regressions, debug complex simulations, analyze coverage, and collaborate across teams to close design and verification issues.
• Good written and verbal communication, attention to detail, and ability to mentor or lead technical tasks.
• Nice-to-have: FPGA-based emulation/prototyping experience and prior work on CPU or MP subsystem architectures.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Master's degree preferred.

About the Company

Company: Advanced Micro Devices

Headquarters: Sunnyvale, California, USA

Advanced Micro Devices, or AMD, is a global semiconductor company that designs and manufactures microprocessors, graphics processors, and related technologies for a variety of computing devices. Known for pushing the boundaries of innovation, AMD's mission is to deliver high-performance computing solutions for AI, data centers, gaming, and embedded applications. They foster a collaborative, inclusive culture focused on creativity and problem-solving, aiming to drive progress and excellence in technology.