RTL Design (DDR) - Senior Lead
QualcommJob Title
RTL Design (DDR) - Senior Lead
Role Summary
Senior RTL design engineer responsible for RTL and architecture work on DDR IP within ASIC/SoC teams. Collaborates with cross-functional hardware and software teams to deliver high-performance, low-power IP blocks and ensure correct integration and verification at block and SoC levels.
Experience Level
Senior-level. Preferred 5+ years of ASIC design experience. Minimum qualification guidance provided by employer: Bachelor's +3 years, Master's +2 years, or PhD +1 year of relevant ASIC design/verification/validation/integration experience.
Responsibilities
Primary responsibilities include:
- Define, model, and implement RTL for DDR IP and related blocks.
- Create architectures, circuit/logic specifications, and system simulations from system requirements.
- Collaborate with software and hardware architecture teams to develop implementation strategies that meet system and customer requirements.
- Evaluate and optimize design flow from high-level design through synthesis, place-and-route, timing and power analysis, and verification.
- Use EDA and design tools (e.g., RTL-to-GDS flows, Virtuoso) to execute design and verification tasks.
- Write and review technical documentation for EDA/IP/ASIC projects.
- Provide guidance to other team members and interact with senior leadership on technical decisions.
Requirements
Must-have skills and experience; followed by desirable items.
- Must-have: Practical experience in ASIC RTL design, verification, validation, or integration.
- Experience with architecture and design tools and with design verification methods.
- Proficiency with scripting and programming languages commonly used in ASIC flows (for example Python, TCL).
- Familiarity with RTL-to-GDS flow, synthesis, place-and-route, timing and power analysis.
- Strong technical writing and verbal communication; ability to work independently and mentor others.
- Experience interacting with senior leadership and influencing technical direction.
- Nice-to-have: Experience with Virtuoso, analog/mixed-signal flows, DDR PHY design, or SoC-level integration.
Education Requirements
Employer specifies: Bachelor's degree in Science, Engineering, or a related field (with ~3+ years relevant ASIC experience) OR Master's degree in Science/Engineering or related field (with ~2+ years) OR PhD in Science/Engineering or related field (with ~1+ year). Preferred fields include Electrical/Electronic Engineering, Computer Engineering, or Computer Science. No specific certifications listed.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
