RISC-V CPU Microarchitecture / RTL Engineer
Owner of a RISC-V CPU unit microarchitecture and RTL implementation. Responsible for defining unit specifications, delivering high-quality RTL, driving verification strategy, and achieving PPA (power, performance, area) targets for units such as branch predictor, rename, scheduling, vector execution, and load/store subsystems.
This is a remote role based in the United States. Employment may be contingent on eligibility to access U.S. export-controlled technology; citizenship, permanent residency, or a government license may be required.
Mid-level. Tenstorrent considers candidates across seniorities and will determine the appropriate level during the interview process; no explicit years-of-experience requirement stated.
Key responsibilities for the role include:
Must-have skills and experience:
Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
Company: Tenstorrent
Headquarters: Austin, Texas, United States
Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.
