RISC-V CPU Design Verification Staff Engineer
QualcommJob Title
RISC-V CPU Design Verification Staff Engineer
Role Summary
Staff design verification engineer responsible for planning and executing verification for high-performance, low-power RISC-V CPU cores. The role is on the hardware/verification team and requires collaboration with architects, RTL designers, software and SoC teams to validate CPU features across simulation, emulation, FPGA, and silicon.
Experience Level
Senior (Staff). Qualcomm lists degree-based minimums (Bachelor's +4 years, Master's +3 years, PhD +2 years) and the posting indicates staff-level experience (examples show 8+ years for similar roles).
Responsibilities
Primary responsibilities include verification planning, test development, and cross-team validation of CPU designs.
- Develop and execute verification plans for CPU units and features.
- Use simulation and formal verification methodologies to run test plans.
- Design and implement testbench components: checkers, assertions, stimulus generators.
- Implement assembly and C language tests to verify CPU architecture and microarchitecture.
- Collaborate with architects, RTL designers, software and SoC teams on system use cases.
- Enable and validate verification on emulators and FPGA platforms.
- Debug and triage failures across simulation, emulation and silicon bring-up.
Requirements
Must-have technical skills and experience for the role.
- Proven design verification experience on CPUs, preferably high-performance and low-power RISC-V cores.
- Experience with simulation and formal verification flows and methodologies.
- Strong RTL verification skills: testbench development, assertions, checkers, and stimulus generation.
- Proficiency in C/C++, scripting languages, and implementing assembly/C tests for verification.
- Experience with HDLs such as Verilog/SystemVerilog.
- Good understanding of CPU architectures and microarchitecture; familiarity with x86/ARM/MIPS/POWER is a plus.
- Experience verifying power-management features: clock-gating, power-gating, UPF, DVFS/DCVS, reliability and throttling mechanisms.
- Experience using emulation and FPGA platforms for verification and debug.
- Strong debug skills across simulation, emulation and silicon environments.
- Nice-to-have: advanced verification techniques (formal, assertion-based verification), DFT and structural debug concepts (JTAG, IEEE1500, MBIST), and memory/scan dump methodologies.
Education Requirements
Qualifications include a Bachelor's, Master’s or PhD in Computer Science, Electrical/Electronics Engineering or a related engineering field. The posting specifies degree-based minimums (Bachelor's with ~4+ years experience; Master's with ~3+ years; PhD with ~2+ years). For staff-level roles the posting also references BE/BTech in CS/EE with ~8+ years of experience. Equivalent practical experience is acceptable as indicated by the OR language in the minimum qualifications.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
