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Research Engineer, Chip Design RL

Anthropic
October 23, 2026
Full-time
Remote friendly (San Francisco, California, United States)
Worldwide
$500,000 - $850,000 USD yearly
ASIC Design Jobs, Level - Mid-Career

Job Title

Research Engineer, Chip Design RL

Role Summary

This role sits on the Code RL team within Anthropic's Reinforcement Learning organization. You will turn chip-design expertise into RL environments, evaluations, and tooling so models can perform practical silicon-design tasks.

The position combines hands-on chip-design knowledge, experimentation, and production training delivery in collaboration with researchers and engineers across Anthropic.

Experience Level

Mid-level. The posting ties years of experience to internal job levels rather than a fixed number; expect substantial professional experience in ASIC/FPGA design and delivery.

Responsibilities

Primary responsibilities include building RL-focused infrastructure, running experiments, and producing artifacts that can be used in research and production training.

  • Design and implement RL environments and evaluation suites for agentic RTL generation, verification (including formal), and physical-design optimization.
  • Define proxy rewards and optimize EDA-tool latency to make training and evaluation feasible at scale.
  • Develop tooling and automation to integrate chip-design flows with training pipelines.
  • Run experiments, analyze results, and iterate on research and engineering roadmaps.
  • Deliver reproducible outputs suitable for research and production training runs.
  • Collaborate with researchers, applied engineers, alignment teams, and external partners as needed.

Requirements

Must-have technical skills and practical experience; additional desirable skills listed afterward.

  • Must-have: Proven experience in ASIC or FPGA design workflows (RTL, design verification such as UVM and formal methods, coverage-driven verification, synthesis, place-and-route, timing closure, PPA optimization, DFT, ECOs).
  • Must-have: Fluency with industry EDA tools and standard chip-design processes.
  • Must-have: Experience taking designs from specification toward silicon (taped-out chips) or equivalent end-to-end delivery experience.
  • Must-have: Ability to translate chip-design tasks into measurable environments, signals, and evaluation criteria for ML training.
  • Nice-to-have: Experience with reinforcement learning, building RL environments, or running ML evaluations.
  • Nice-to-have: Prior work on ML accelerators, high-performance compute hardware, high-level synthesis, or architecture simulators.
  • Nice-to-have: Experience building automation or tooling around chip-design flows that accelerate experimentation.

Education Requirements

Minimum education: Bachelor's degree or an equivalent combination of education, training, and/or experience. Required field: a field relevant to the role as demonstrated through coursework, training, or professional experience. The posting explicitly allows equivalent practical experience in place of a degree.


About the Company

Company: Anthropic

Headquarters: San Francisco, CA, United States

Anthropic is an AI research and safety company developing reliable, interpretable, and steerable large language models (Claude) and related tools, focusing on alignment, reinforcement learning, and scalable infrastructure for safe AI deployment.

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Date Posted: 2026-10-22