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R&D Engineering Manager

Synopsys
November 2, 2026
Full-time
On-site
Noida, Uttar Pradesh, India
Semiconductor IP Jobs, Level - Senior

Job Title

R&D Engineering Manager

Role Summary

Lead a multi-site engineering team that develops embedded memory IP (SRAM, register files, TCAM, ROM) across advanced FinFET nodes. The role owners the technical direction, delivery, and cross-functional collaboration required to deliver memory compilers and characterized models to customers.

Experience Level

Senior - requires substantial leadership and technical experience. The posting specifies 15+ years of experience in embedded memory design.

Responsibilities

Manage technical delivery, team development, and cross-functional alignment for memory IP projects.

  • Lead and mentor engineers in architecture, circuit design, layout planning, verification, characterization, and model generation.
  • Oversee the full memory design flow from architecture through schematic, simulation, layout, verification, characterization, and model generation.
  • Drive low-power and area-efficient circuit design strategies addressing performance, variation, and manufacturability tradeoffs.
  • Coordinate with CAD teams on layout verification, parasitic extraction, and compiler automation.
  • Manage project timelines, prioritize deliverables, and resolve technical and resourcing issues across multi-site teams.
  • Build and maintain relationships with internal stakeholders and external customers to translate requirements into executable design plans.
  • Improve design flows, automation scripts, and characterization methodologies to accelerate time-to-market for memory compilers.

Requirements

Must-have technical skills and leadership experience required to run memory IP projects and teams.

  • 15+ years hands-on experience in embedded memory design, including SRAM, register file, TCAM, or ROM.
  • Deep expertise across the memory design flow: architecture, circuit design, layout, compiler automation, characterization, timing, and model generation.
  • Proven experience leading engineering teams and delivering complex projects on schedule in a multi-site environment.
  • Strong proficiency in Perl and Python for design automation and scripting.
  • Hands-on experience with deep submicron and FinFET technologies and variation-aware design techniques.
  • Solid understanding of CMOS fundamentals, digital design, RC circuits, transfer function analysis, and CMOS fabrication processes.
  • Ability to dive into difficult debug sessions and to mentor engineers through technical problems.

Education Requirements

BE/B.Tech/ME/M.Tech/MS in Electrical & Electronics Engineering from a recognized institute or university.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-11-01