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R&D Engineer, IC Design (Level 4)

Broadcom
August 07, 2026
Full-time
On-site
Austin, Texas, United States
RTL Design Jobs, Level - Senior

Job Title

R&D Engineer, IC Design (Level 4)

Role Summary

Lead front-end design and verification for ASIC cores, covering architecture definition, RTL implementation, synthesis, and verification. Work with physical design and system teams to ensure timing closure and functional correctness of high-frequency designs.

Experience Level

Senior β€” experience guidance provided in Education Requirements: typically Master's with 6+ years' related experience or Bachelor's with 8+ years.

Responsibilities

Primary responsibilities for the role include design, verification, and collaboration with downstream teams.

  • Define architecture and design logic blocks from system requirements.
  • Implement RTL and perform synthesis; develop constraints for designs.
  • Perform design verification using simulation and formal methods.
  • Analyze timing from physical implementation and drive timing closure.
  • Simulate and debug designs using Verilog-based simulation flows.
  • Coordinate with physical design, DFT, and power teams to meet performance and testability goals.

Requirements

Must-have technical skills and tools for immediate contribution.

  • Strong RTL design and verification experience (Verilog/SystemVerilog).
  • Experience with synthesis tools (Synopsys Design Compiler / Cadence RTL Compiler) and writing constraints.
  • Static timing analysis experience with Synopsys PrimeTime for high-frequency designs.
  • Familiarity with liberty (LIB) timing models and timing signoff flows.
  • Experience with formal verification tools (e.g., Synopsys Formality, Cadence Conformal).
  • Linting and quality tools such as SpyGlass; power analysis of RTL and gate-level netlists.
  • Knowledge of DFT and scan methodology and handoff to test teams.
  • Scripting skills (TCL, Perl) for flow automation.
  • Version control experience (Git, SVN).

Nice-to-have:

  • Prior experience on high-frequency SoC or ASIC projects.
  • Exposure to gate-level simulation and ECO flows.

Education Requirements

BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field β€” or equivalent practical experience. Typical hiring guidance from the posting: Bachelor's degree with 8+ years' related experience, or Master's degree with 6+ years' related experience.


About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.

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Date Posted: 2026-08-06