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R&D Engineer IC Design

Broadcom
August 04, 2026
Full-time
On-site
San Jose, California, United States
$143,800 - $230,000 USD yearly
RTL Design Jobs, Level - Senior

Job Title

R&D Engineer IC Design

Role Summary

Design and validate ASIC blocks for physical-layer products used in high-speed optical communication. Work spans architecture, RTL implementation, verification, synthesis, timing closure, silicon bring-up and ATE program development.

Position operates within an IC design organization collaborating with cross-functional and geographically distributed teams to deliver production silicon.

Experience Level

Senior β€” typically 10+ years of relevant IC design experience (posting specifies ~12 years with a BS, or ~10 years with an MS/PhD).

Responsibilities

Primary duties from architecture through silicon validation:

  • Architect block-level design specifications from marketing/system requirements.
  • Produce detailed design documentation and timing constraint files.
  • Develop RTL and perform verification tasks: lint, CDC, equivalency checks, synthesis, STA, RTL/gate simulations.
  • Troubleshoot and debug at silicon bring-up and support laboratory validation.
  • Script automation for STA, equivalency checks, testbenches, simulations and synthesis (Unix/Perl/Python).
  • Prepare block-level resource estimates, development schedules, verification and test plans.
  • Perform design trade-off analysis (leakage, dynamic power, die size, schedule, priority).
  • Support ATE program bring-up and qualification for volume production.
  • Collaborate with teams in different locations and time zones.

Requirements

Must-have technical skills and professional abilities (degree details appear under Education Requirements):

  • Extensive experience with high-speed digital circuit design.
  • Knowledge of ARM subsystems and integration.
  • Experience with digital upsampling/downsampling techniques.
  • Familiarity with Ethernet/OTN standards (10G/100G/200G/400G/800G) and FEC design.
  • Proven RTL simulation and synthesis experience and timing closure skills.
  • In-depth experience with low-power design techniques, DFT and DFM practices.
  • Proficiency in Verilog and/or VHDL; scripting in Unix/Perl or Python; C for tools/test code.
  • Hands-on lab debugging experience and proven silicon validation skills.
  • Strong analytical, organization and communication skills; able to drive issues to closure.
  • Ability to script and automate EDA flows and verification tasks.
  • Nice-to-have: digital signal processing and error-correction-code experience.

Education Requirements

Degree required: B.S. in Electrical Engineering or Computer Engineering (with a minimum of ~12 years related experience), or M.S./Ph.D. in Electrical Engineering or Computer Engineering (with a minimum of ~10 years related experience).


About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.

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Date Posted: 2026-08-01