Broadcom logo

R&D Engineer, IC Design 4

Broadcom
August 09, 2026
Full-time
On-site
Austin, Texas, United States
RTL Design Jobs, Level - Senior

Job Title

R&D Engineer, IC Design 4

Role Summary

Front-end ASIC design and verification engineer responsible for architecture definition, RTL/logic design, synthesis, and verification of digital cores. Work focuses on achieving functional correctness and timing closure for high-frequency designs.

Collaborate with cross-functional teams including physical implementation, system architects, and verification to deliver robust, production-ready IP blocks.

Experience Level

Senior β€” typically 6–8+ years of relevant ASIC/SoC design experience (see Education Requirements for degree/experience guidance).

Responsibilities

Primary duties include front-end implementation and verification of ASIC logic blocks and supporting handoff to downstream teams.

  • Define architecture and design logic blocks from system requirements.
  • Implement RTL (Verilog) and develop synthesis constraints for design blocks.
  • Run synthesis flows and participate in synthesis-related debug.
  • Perform design verification using simulation and formal verification methods.
  • Analyze timing results from physical implementation and work toward timing closure.
  • Simulate, debug, and triage RTL and gate-level issues.

Requirements

Concise list of required technical skills and useful tool experience.

  • Must-have: Proven experience in front-end ASIC/SoC design and verification (RTL design, simulation, debug).
  • Must-have: Experience with synthesis flows and constraint development.
  • Must-have: Timing analysis experience and familiarity with timing closure workflows.
  • Must-have: Proficiency in scripting for automation (TCL, Perl).
  • Preferred tools/experience: Synopsys Design Compiler or Cadence RTL Compiler; Synopsys PrimeTime for timing analysis; familiarity with liberty (LIB) timing models.
  • Preferred tools/experience: Formal verification tools (e.g., Synopsys Formality, Cadence Conformal), lint tools (Spyglass), power analysis on RTL/gate-level netlists, DFT/scan methodology.
  • Preferred: Version control experience (Git or SVN).

Education Requirements

Bachelor's or Masters in Electrical Engineering, Computer Engineering or a closely related technical field. The posting specifies a Bachelor's degree with ~8+ years of related experience or a Master's degree with ~6+ years of related experience; equivalent practical experience is acceptable.


About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.

Broadcom logo

Date Posted: 2026-08-08