Job Title
R&D Engineer IC Design 4
Role Summary
Responsible for front-end digital ASIC/IC design and verification of logic blocks for high-performance cores. Work includes architecture definition, RTL design, synthesis constraints, verification (simulation and formal), and timing analysis tied to physical implementation.
Member of a multi-location engineering team; will work independently on assigned blocks and collaborate across teams to deliver silicon-ready RTL.
Experience Level
Senior. Typical experience: Bachelors plus 8+ years related experience, or Masters plus 6+ years related experience.
Responsibilities
The role focuses on front-end design and verification tasks. Key responsibilities include:
- Define architecture and implement RTL/logic from system requirements.
- Develop synthesis constraints and perform RTL synthesis flows.
- Verify designs using Verilog simulation and formal verification tools.
- Analyze timing results from physical implementation and perform timing closure activities.
- Perform power analysis at RTL and gate-level.
- Debug and simulate design issues; support integration and tape-out activities.
- Collaborate with physical design, DFT, and verification teams across locations.
Requirements
Must-have technical skills and experience:
- Proven experience with complete ASIC/standard-product implementation flow: RTL β synthesis β timing analysis/closure.
- Proficiency in scripting (TCL, Perl) for design flows and automation.
- Synthesis experience with Synopsys Design Compiler / DC topo or Cadence RTL Compiler.
- Static timing analysis experience with Synopsys PrimeTime for high-frequency designs and advanced nodes.
- Understanding of Liberty (.lib) timing models.
- Formal verification experience (e.g., Synopsys Formality or Cadence Conformal).
- Static linting experience (e.g., SpyGlass).
- Power analysis of RTL and gate-level netlists.
- Familiarity with DFT/scan methodology.
- Version control experience (svn, git, or similar).
Nice-to-have:
- Prior work on advanced technology nodes and high-frequency IP blocks.
- Experience across physical implementation and sign-off flows.
Education Requirements
Bachelor's or Master's in Electrical Engineering, Computer Engineering, or a related technical field, or equivalent practical experience. Hiring guidance in the posting: Bachelor's plus 8+ years of related experience, or Master's plus 6+ years of related experience.
About the Company
Company: Broadcom
Headquarters: Irvine, California, United States
Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.

Date Posted: 2026-07-03