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R&D Engineer IC Design 4

Broadcom
August 04, 2026
Full-time
On-site
Austin, Texas, United States
RTL Design Jobs, Level - Senior

Job Title

R&D Engineer IC Design 4

Role Summary

Responsible for front-end ASIC core design and verification, covering architecture definition, RTL logic design, synthesis, and verification using simulation and formal methods. Work with cross-functional teams including physical implementation, DFT, and power analysis to deliver silicon-ready designs.

Experience Level

Senior β€” typically requires a Bachelors degree with 8+ years of relevant ASIC design experience or a Masters degree with 6+ years; equivalent practical experience is acceptable.

Responsibilities

Deliver RTL-based blocks from requirements through synthesis and verification, and work with implementation teams to achieve timing and test goals.

  • Define architecture and design RTL logic blocks from system requirements.
  • Perform synthesis and develop constraints for design blocks.
  • Execute simulation and formal verification to validate functionality.
  • Analyze post-layout timing with PrimeTime and drive timing closure for high-frequency designs.
  • Simulate, debug, and troubleshoot designs using Verilog simulation flows.
  • Collaborate with physical implementation, DFT, and power teams to meet performance and test objectives.

Requirements

Core technical skills and tool experience required for successful performance in the role.

  • Proven front-end ASIC design and implementation experience (architecture, RTL, synthesis, verification).
  • Strong RTL design skills and experience with Verilog simulation.
  • Experience with synthesis tools such as Synopsys Design Compiler/DC topo or Cadence RTL Compiler and constraints development.
  • Timing analysis experience with Synopsys PrimeTime and familiarity with liberty (LIB) timing models.
  • Experience with formal verification tools (e.g., Synopsys Formality, Cadence Conformal).
  • Proficiency in scripting (TCL and/or Perl).
  • Familiarity with lint tools (Spyglass) and power analysis of RTL and gate-level netlists.
  • Knowledge of DFT and scan methodology.
  • Version control experience (SVN or Git).

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field β€” or equivalent practical experience. Typical experience guidance: Bachelor's +8 years or Master's +6 years.


About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.

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Date Posted: 2026-07-31