R&D Engineer IC Design 4

Job Title

R&D Engineer IC Design 4

Role Summary

Responsible for front-end design and verification of digital ASIC/IC blocks. The role covers architecture definition, RTL logic design, synthesis constraints, verification (simulation and formal), and timing analysis through physical implementation for high-frequency, advanced-node designs.

Experience Level

Senior-level. Typical experience: about 6–8+ years of relevant ASIC or IC design experience (for example, Master's +6 years or Bachelor's +8 years).

Responsibilities

Primary responsibilities include design, verification, and timing/power analysis of digital logic blocks.

• Define architecture and implement RTL logic from system requirements.
• Develop synthesis constraints and perform RTL synthesis.
• Verify designs with simulation, formal verification, and lint checks; debug with Verilog testbenches.
• Perform static timing analysis and work on timing closure with physical implementation teams.
• Conduct power analysis on RTL and gate-level netlists.
• Apply DFT/scan methodologies and ensure testability.
• Automate flows with scripting and use version control; collaborate across distributed teams.

Requirements

Must-have technical skills and tool experience:

• Experience with the complete ASIC implementation flow: RTL → synthesis → timing analysis/closure.
• Synthesis experience with Synopsys Design Compiler / DC topo or Cadence RTL Compiler.
• Static timing analysis using PrimeTime and familiarity with Liberty (LIB) timing models.
• Formal verification experience (e.g., Synopsys Formality or Cadence Conformal) and linting tools (Spyglass).
• TCL/Perl scripting for flow automation.
• Power analysis experience on RTL and gate-level netlists.
• Familiarity with DFT/scan methodology and version control systems (svn, git, etc.).

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field is preferred. Typical experience combinations listed: Bachelor's +8+ years or Master's +6+ years. Equivalent practical experience is considered.

Salary range: USD 121,900–195,000 yearly. Eligible for discretionary bonus, equity awards, and standard company benefits.

About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.