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Qubit Control Physical Design Engineer

Intel Corporation
June 17, 2026
Full-time
Remote friendly (Hillsboro, Oregon, United States)
Worldwide
$141,910 - $269,100 USD yearly
Physical Design Jobs, Level - Senior

Job Title

Qubit Control Physical Design Engineer

Role Summary

Responsible for block-level physical implementation of qubit control designs, driving RTL-to-GDS convergence and meeting power, performance, and area (PPA) targets. Collaborates with CAD, physical-design methodology, custom IP, and cross-functional teams to deliver physical design closure and improve silicon yield for cryogenic control systems.

Experience Level

Senior-level β€” hiring guideline: 8+ years of relevant experience.

Responsibilities

Primary responsibilities include physical implementation, verification, and methodology development:

  • Drive RTL-to-GDS design convergence via logic synthesis and place-and-route to meet PPA goals.
  • Execute floorplanning, bus/pin planning, power and clock distribution, congestion analysis, timing closure, IR drop analysis, ECOs and sign-off.
  • Work with CAD and PD methodology teams to adopt and optimize synthesis/PNR tool features for cryogenic control designs.
  • Co-optimize memory macros and standard-cell libraries with custom IP teams to improve area, performance, power, and yield.
  • Perform physical verification, static timing and power analysis, and support silicon bring-up and yield improvements.
  • Contribute to physical design methodologies and provide mentorship to junior engineers when applicable.

Requirements

Must-have skills and technologies; preferred items noted.

  • Experience with logic design and digital circuits.
  • Proficiency in Python, Perl/TCL, Linux/Unix shell scripting, and C.
  • Practical experience with synthesis, place-and-route (PnR), static timing analysis (STA), and power analysis tools.
  • Ability to perform timing budgeting, floor-planning, congestion and IR drop analysis, physical ECOs, and sign-off activities.
  • Strong communication and collaboration skills to work across CAD, PD, and IP teams.
  • Preferred: experience in low-power, high-frequency physical design techniques, DFT/DFM flows, and deep sub-micron technology implications.

Education Requirements

Bachelor's, Master's, or Ph.D. degree OR equivalent practical experience. The posting allows qualifying experience gained via professional employment, academic institutions, research activities, university projects, coursework, or other comparable educational or professional endeavors. (Minimum hiring guideline: 8+ years of relevant experience.)


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-06-16