Project Engineering Management, Sr Staff Engineer
Manage and drive front-end mixed-signal semiconductor IP (MSIP) projects, overseeing requirements, schedules, status reporting, risk tracking, and cross-functional execution. Collaborate with product engineering managers, R&D, circuit (CKT) and design integration (DI) teams; support sales and marketing for customer quotes and technical/customer issues.
Senior β typically requires 8+ years of relevant experience in SoC/IP or ASIC front-end flows.
Primary responsibilities include project planning, tracking, cross-team coordination, and ensuring delivery of FE MSIP product work.
Combination of technical domain knowledge, project management capability, and interpersonal skills.
Not specified.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
