Product Engineer, Silicon Validation

Job Title

Product Engineer, Silicon Validation

Role Summary

Lead silicon validation, test program development, and productization for large-format AI accelerator chips. Work across design, system validation, operations, and external vendors to move from first silicon to high-volume manufacturing (HVM) with a focus on production quality, test cost, and yield.

Experience Level

Mid-level. Targeted experience: approximately 5–10+ years in silicon validation, product engineering, and ATE/test development for advanced-node semiconductor products.

Responsibilities

Execute validation and test program activities spanning first silicon through production release and HVM.

• Plan and perform silicon characterization: V/F/T corners, guard-band determination, and production limit setting.
• Architect test flows to balance test time, coverage, and yield learning for large AI accelerator dies.
• Drive yield-improvement initiatives using data-driven root-cause analysis and statistical methods.
• Establish and track quality metrics such as DPPM and test escapes.
• Bring up die/package-level hardware, troubleshoot failure modes, and collaborate with design and system teams to resolve issues.
• Support OSAT and ATE/SLT bring-up; manage manufacturing test program releases toward aggressive test-cost targets.
• Productize test programs and methodologies for smooth transition from engineering to HVM.
• Analyze field returns and system failures to identify coverage gaps and improve screening.
• Manage relationships with test vendors, OSAT partners, and foundries; drive ATE-system correlation activities.

Requirements

Must-have technical skills and proven experience required to perform the role.

• 5–10+ years of hands-on silicon validation, product engineering, and ATE/test development for advanced-node semiconductors.
• Proven track record in yield optimization and measurable DPPM reduction.
• Experience with silicon characterization methodologies including Fmax/Vmin and power/thermal validation.
• High-volume manufacturing test experience with production-scale results.
• Proficiency with yield/failure analysis tools and methods (examples: JMP, Exensio, DataPower, OptimalPlus).
• Strong skills in test program debugging, failure-analysis correlation, and yield enhancement techniques.
• Experience coordinating with OSATs, ATE vendors, and foundry partners to release and optimize test programs.

Nice-to-have qualifications:

• Experience developing ATE test programs for wafer sort and final test on Advantest V93K platforms.
• Background testing GPU, HPC, or AI accelerator chips at production scale.
• HBM or other high-speed memory interface testing and characterization experience.
• Experience leading NPI through HVM with multi-vendor qualification across OSAT sites.
• Multi-site parallel testing strategies and test-time optimization for large-format dies.
• Scripting and automation for test-data analysis and workflows (Python, Perl, TCL).

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.

About the Company

Company: Etched

Headquarters: San Jose, CA, United States

Etched develops purpose-built AI inference ASICs and systems optimized for transformer models, aiming to deliver significantly higher performance, lower cost, and lower latency than GPUs. The company focuses on enabling applications like real-time video generation and advanced reasoning agents, and is backed by leading investors and engineers.