Product Development/DFX Lead - Neuromorphic Computing
Intel CorporationJob Title
Product Development/DFX Lead - Neuromorphic Computing
Role Summary
Lead the design-for-test (DFT) and design-for-assembly/testability (DFX) strategy for Intel's neuromorphic silicon program, working across architecture, RTL, and silicon bring-up to enable high-volume manufacturing.
Collaborate with circuit designers, design architects, and manufacturing teams to define test strategies, implement fault-coverage solutions, and deliver reliable production flows for mixed synchronous/asynchronous SoC designs.
Experience Level
Senior — expects candidates with substantial DFT/DFX experience (guidance: multi-year ownership of DFT at IP and SoC level; specific years detailed in Education Requirements).
Responsibilities
Key responsibilities include technical leadership of DFT/DFX strategy and delivery across pre-silicon and post-silicon phases.
- Architect SoC-level DFT solutions covering both synchronous and asynchronous partitions.
- Lead flow development for scan insertion and compression at partition and SoC levels.
- Develop frameworks spanning EDA tools, RTL, and emulation to generate and validate high-quality test vectors pre-silicon.
- Collaborate with designers to drive DFT/DFD/DFM features for manufacturing readiness and high-volume manufacturing (HVM).
- Lead silicon power-on, enable tester content, debug failures, and maintain test tools and flows.
- Define and implement reliability and fault-coverage strategies across the product lifecycle.
Requirements
Must-have technical experience and skills (minimum qualifications consolidated; education details are listed separately under Education Requirements).
- Hands-on DFT experience across the stack: scan insertion, compression, ATPG vector generation, and silicon bring-up.
- Proven ownership of IP and SoC-level scan constructs (boundary scan/JTAG, TAP, BIST/MBIST).
- Experience debugging post-silicon failures and driving circuit/design changes for testability and reliability.
- Experience developing EDA/flow automation and scalable frameworks for test vector generation and validation.
- Familiarity with power-on/test procedures and automatic test equipment (ATE) test-time reduction techniques.
- Strong RTL and verification skills (e.g., SystemVerilog, SystemC, object-oriented verification methodologies).
Nice-to-have:
- Experience with custom ASICs or AI/ML accelerator design and post-silicon yield activities (bin split, die-level cherry picking, fault grading).
- Experience with asynchronous architectures and circuits.
- Experience using AI-assisted tools or agentic workflows to set up flows, debug, or improve productivity.
Education Requirements
Bachelor's degree with 6+ years of hands-on DFT experience, or Master’s degree with 4+ years of hands-on DFT experience (architecture to silicon bring-up). Fields of study or explicit equivalent-degree language not specified in the posting.
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
