Principal Test Engineer

Job Title

Principal Test Engineer

Role Summary

Lead ATE test enablement, first-silicon bring-up, characterization, and production release for complex SoCs using Advantest 93K and SmarTest. The role coordinates cross-functional teams (Design, DFT, Product Engineering, vendors, OSATs) to deliver production-ready test solutions and scalable manufacturing execution.

Experience Level

Senior — requires extensive industry experience; posting specifies 12+ years in semiconductor manufacturing and test.

Responsibilities

Deliver ATE strategy and manage test program lifecycle from bring-up through high-volume manufacturing.

• Own test enablement for silicon projects: ATE strategy, tester hardware configuration, SmarTest program structure, test flow, datalogging, and manufacturing readiness.
• Lead first-silicon ATE bring-up: daily progress reporting, issue triage, silicon/ATE debug, characterization, correlation, and handoff to CP/FT/SLT/OSAT/HVM.
• Define and execute ATE characterization across voltage, frequency, temperature, process corners, functional content, HSIO margins, structural coverage, binning, and guardbands.
• Develop and maintain test methods, flows, revision control, pattern conversion infrastructure, and production test content (functional, HSIO, ATPG/Scan, MBIST, PHY BIST, DC, leakage, IDDQ, etc.).
• Coordinate ATE hardware development with vendors and OSATs: probe cards, load boards, sockets, thermal control, HSIO connectivity, signal integrity, and power delivery.
• Drive cross-functional debug and continuous improvement with Design, DFT, Firmware, Product Engineering, suppliers, and third-party teams to close coverage gaps and improve yield.

Requirements

Key required skills and experience for immediate contribution.

• 12+ years in semiconductor manufacturing, ATE test development, silicon bring-up, characterization, or production release for complex SoCs or advanced semiconductor products.
• Expert hands-on experience with Advantest 93K and SmarTest 7/8 test program development, tester hardware, pattern development, datalogging, and production integration.
• Strong background in test architecture and HSIO test/debug (PCIe, UCIe, DDR, SerDes, PHY BIST), bench-to-ATE correlation, oscilloscopes, BERTs, emulation and margining.
• Working knowledge of functional testing, structural test integration, DFT concepts, packaging, product qualification, and HVM release requirements.
• Proven experience owning end-to-end execution from architecture through first silicon, CP/FT deployment, OSAT release, production ramp, and yield/debug activities.
• Demonstrated ability to lead cross-functional teams and collaborate with vendors, OSATs, and third-party contractors on complex debug and delivery.
• No relocation package is available for this role.

Education Requirements

Not specified.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.