Principal Test Development Engineer (ATE)

Job Title

Principal Test Development Engineer (ATE)

Role Summary

Principal-level test engineer on the New Product Introduction (NPI) test engineering team. Lead design and delivery of ATE test solutions for characterization, wafer sort and production for high-speed silicon (AI compute, server, and network processors).

Work cross-functionally with Product, Hardware, Design, Firmware and DFx teams to develop scalable, high-quality test programs and hardware for Advantest 93K and Teradyne tester platforms.

Experience Level

Senior — Principal level. The posting defines experience ranges: typical background is 10–15 years with a Bachelor's, or 5–10 years with an advanced degree.

Responsibilities

Primary responsibilities focus on developing and delivering ATE solutions across the product lifecycle.

• Lead development of ATE test programs for characterization, wafer sort, and production on Advantest 93K and/or Teradyne UltraFLEX platforms.
• Design and develop ATE test hardware for high-speed digital testing and system-level testability.
• Create and own detailed test methodologies, test plans, and associated documentation aligned with product specs and quality requirements.
• Translate simulation test patterns into ATE-ready test programs and support handoff to high-volume manufacturing.
• Lead testability and test-plan reviews with DFx and design teams; recommend yield and test methodology improvements.
• Optimize test flows to reduce test time, improve yield, and streamline production test releases.
• Collaborate with cross-functional teams to debug failures and iterate test solutions during NPI.

Requirements

Must-have technical skills and professional experience.

• 6+ years test program development on Advantest 93K and/or Teradyne UltraFLEX ATE platforms.
• Proven experience in ATE testing, test methodology, DFT/DFM, silicon process understanding, and high-speed digital testing.
• Proficiency in C/C++, Perl, Python, Java and comfortable in a Linux development environment.
• Strong debugging and problem-solving skills; experience translating design validation into production tests.
• Effective communication and collaboration skills; able to lead cross-functional technical reviews.
• Ability to manage multiple tasks in a fast-paced NPI environment as an individual contributor and technical lead.
• Familiarity with AI compute platforms, server and network processor architectures is beneficial.

Education Requirements

Bachelor's degree in Electrical Engineering or related field is listed (typical experience 10–15 years). A Master's degree or PhD in Electrical Engineering or related field is acceptable with reduced experience expectations (typically 5–10 years). No certifications were specified; the posting ties degree level to years of experience rather than listing an "equivalent experience" clause explicitly.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.