Principal SoC Solutions Engineer

Job Title

Principal SoC Solutions Engineer

Role Summary

Lead technical customer engagements to integrate Memory Interface and Interface IP into production SoC designs. Develop reference subsystems, validate system-level functionality, and support silicon bring-up and deployment.

Work within the Interface IP group to enable customer adoption of memory and interface technologies across AI, networking, automotive, and mobile applications.

Experience Level

Senior - typically 15+ years of industry experience in SoC design, verification, implementation, or silicon development.

Responsibilities

Accountabilities include technical leadership with customers, reference design creation, and ensuring silicon readiness of integrated IP subsystems.

• Lead customer engagements for integration, bring-up, and deployment of Memory Interface PHY and Controller IP (HBM, DDR, LPDDR).
• Develop reference designs and subsystem architectures demonstrating best practices for SoC integration.
• Drive subsystem verification, validation, and silicon readiness to accelerate customer deployment.
• Integrate memory and interface IP into production SoC designs and support silicon bring-up and post-silicon debug.
• Resolve integration, performance, interoperability, and deployment issues across advanced design environments.
• Act as technical liaison between customers and internal engineering/product teams to reduce deployment risk and shorten time-to-market.
• Provide technical training, workshops, and presentations to support customer implementation and architecture decisions.
• Feed customer deployment insights back to product and engineering teams to improve product quality and integration flows.

Requirements

Must-have skills and experience.

• 15+ years of industry experience in SoC design, verification, implementation, or silicon development.
• Hands-on experience with Memory Interface IP (DDR, LPDDR, HBM) and Interface IP (PCIe, Ethernet, CXL, UCIe).
• Proven track record developing reference designs and integrating complex IP subsystems into SoCs for production.
• Experience with subsystem architecture, verification, silicon bring-up, system validation, and post-silicon debugging.
• Strong understanding of Controller IP, PHY integration, AMBA/AXI interfaces, ASIC design flows, SoC architecture, and backend considerations.
• Proficiency with Linux, Verilog/SystemVerilog, and simulation and debug environments; familiarity with modern ASIC development methodologies.
• Excellent communication and collaboration skills; ability to work across customer, R&D, product, and engineering teams.
• Nice-to-have: familiarity with DDR5/LPDDR6, MRDIMM2, HBM4, VIP, and emerging interconnect standards.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, ideally with a VLSI focus.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.