Principal SoC RAS Architect

Job Title

Principal SoC RAS Architect

Role Summary

Lead the Reliability, Availability and Serviceability (RAS) strategy and architecture for next-generation SoCs targeted at data center applications. Partner with design, verification, manufacturing, firmware, and product teams to define RAS goals, roadmaps, and end-to-end solutions that meet data center-class reliability and lifecycle requirements.

Experience Level

Senior — requires 10+ years of SoC development experience with a strong focus on RAS architecture and deployment.

Responsibilities

Primary responsibilities include setting RAS direction and ensuring implementation across the product lifecycle.

• Define RAS requirements and measurable goals for next-generation SoCs.
• Architect scalable RAS solutions that balance power, performance, and area (PPA).
• Specify and guide reliability-aware design techniques (ECC, parity, error logging, detection, mitigation).
• Drive RAS efforts across front-end design, physical implementation, verification, and manufacturing teams.
• Coordinate with firmware and software teams to ensure end-to-end error handling and resiliency.
• Ensure compliance with data center availability and reliability standards and customer expectations.

Requirements

Must-have skills and experience.

• 10+ years of SoC development experience with demonstrated RAS responsibility.
• Deep understanding of data center-class availability and reliability expectations.
• Expertise in fault detection, error handling, and resiliency techniques for large-scale compute platforms.
• Experience specifying and implementing ECC, parity, error logging, and mitigation strategies.
• Proven ability to lead cross-functional teams through design, verification, and silicon bring-up.

Nice-to-have experience.

• Experience with Arm-based architectures and deploying RAS strategies on those platforms.
• Familiarity with reliability modeling, stress and aging analysis, and silicon health monitoring.
• Exposure to industry standards such as RAS for PCIe, CXL, or JEDEC memory.
• Hands-on failure analysis, silicon debug workflows, or background in safety-critical/high-availability systems.

Education Requirements

Master's degree or higher in Computer Engineering, Computer Science, Electrical Engineering, or a related discipline.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.