Principal SoC Design Engineer / SoC Lead

Job Title

Principal SoC Design Engineer / SoC Lead

Role Summary

Lead SoC integration and system-level architecture for a high-bandwidth AI inference SoC. Own cross-domain decisions across DFT, power, timing, and interconnect while coordinating RTL, physical design, verification, and system architects. This is a hands-on leadership role that includes hiring and mentoring specialists.

Experience Level

Senior — principal-level technical leadership. Multiple full-chip tapeouts or equivalent experience expected.

Responsibilities

Primary responsibilities include:

• Lead top-level integration of the full chip or a major module/subsystem and own integration flows.
• Make and defend cross-domain technical decisions spanning system functionality, DFT, power, timing, and interconnect/data-fabric architecture.
• Partner with microarchitecture, RTL, physical design, verification, and DFT teams to resolve system-level tradeoffs.
• Remain hands-on across domains to drive closure through tapeout.
• Hire, mentor, and grow engineers across specialty domains; scale the design organization.
• Represent chip-level architecture for advanced-node, high-speed, high-bandwidth, low-power, physically large designs.

Requirements

Must-have:

• Principal-level technical leadership at a semiconductor or systems company with multiple full-chip tapeouts.
• Demonstrated breadth across domains (DFT, power, timing, interconnect/data-fabric) and system-level tradeoff experience.
• Deep experience in CPU design or high-speed interconnect / data-fabric design; interconnect/data-fabric experience is especially important.
• Experience with advanced process nodes, high-bandwidth I/O, and large, physically large subsystem or full-chip designs.

Nice-to-have:

• Cadence toolchain experience.
• Familiarity with AI/ML accelerator or large-scale compute workloads.
• Experience with AI-assisted EDA flows (e.g., Cerebrus) for synthesis, timing closure, or verification.
• Comfortable as either an individual-contributor technical leader or a people manager.

Education Requirements

Not specified.

About the Company

Company: Neurophos

Headquarters: Sunnyvale, California, United States

Startup developing silicon-photonic AI accelerator chips that use programmable metasurfaces and dense optical cells to perform matrix multiplications at the speed of light, targeting large-scale AI inference with much higher energy efficiency and performance than traditional electronic approaches.