Principal Silicon Engineer
MicrosoftJob Title
Principal Silicon Engineer
Role Summary
Join Microsoft SCHIE's Interface IP team to architect, design, and verify PLL and high-speed clocking solutions for SerDes interface IP used in cloud/server hardware. The role focuses on PLL architecture, low-jitter global clock distribution, post-layout verification, and cross-functional coordination to deliver scalable, manufacturable interface IP.
Hybrid role collaborating with hardware, layout, modeling, and validation teams to improve planning, quality, and delivery for Microsoft cloud infrastructure.
Experience Level
Senior-level. The posting indicates substantial prior technical engineering experience; candidates typically have advanced experience in PLL and high-speed clocking (often 10+ years for specialized PLL expertise).
Responsibilities
The principal responsibilities include:
- Design and verify PLL cores for custom SerDes interface IP.
- Define PLL core architecture and review critical timing cells (digital loop filters, ADC/analog-digital timing interfaces).
- Perform simulation and post-layout verification; coordinate with layout designers and system engineers.
- Own global clock distribution and ensure low-jitter clocking for high-speed clocking spines across the SerDes macro.
- Coordinate with modeling designers to validate PLL functionality and integration.
Requirements
Required skills and conditions:
- Proven experience in PLL design and high-speed clocking architectures, including design, verification, and timing analysis.
- Experience with simulation and post-layout verification workflows and reviewing timing reports for critical timing cells.
- Demonstrated ability to coordinate with layout and modeling teams to drive macro development to tapeout.
- Must be able to pass Microsoft Cloud Background Check and satisfy export-control eligibility and documentation requirements.
Nice-to-have:
- Hands-on layout optimization experience for deep sub-micron nodes.
- Post-silicon validation experience and ability to review DV waveforms and debug calibration-related issues.
- Familiarity with scripting for validation (Python, Perl) and modeling tools (Matlab/Simulink, Analog Behavioural Modeling).
- Experience leading projects end-to-end.
Education Requirements
Doctorate, Master's, or Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field; or equivalent practical experience. The posting specifies degree-plus-experience combinations (e.g., PhD +3 years, MS +6 years, BS +8 years) and notes preferred combinations with longer experience thresholds.
About the Company
Company: Microsoft
Headquarters: Redmond, Washington, United States
Microsoft is a global technology company that develops and sells software, services, devices, and solutions. Known for its Windows operating system, Office suite, and Azure cloud platform, Microsoft aims to empower individuals and organizations around the world to achieve more. The company fosters a culture of innovation and inclusion, focusing on delivering trusted experiences to customers and partners globally.
