Principal SerDes Architect

Job Title

Principal SerDes Architect

Role Summary

Principal engineer responsible for defining and delivering high-speed I/O PHY and SerDes analog architectures and circuits across advanced process nodes. The role partners with architecture, layout, and verification teams to optimize performance, power, area, and yield for analog and mixed-signal IP.

Experience Level

Senior-level. Typical experience expectations per job posting: Bachelor's degree +12+ years or Master's degree +10+ years in analog circuit design and I/O PHY/SerDes work.

Responsibilities

Design and technical-lead responsibilities focused on next-generation high-speed IO PHYs and analog IP.

• Lead architecture definition and development of next-generation high-speed I/O PHYs with target PPA metrics.
• Design, develop, and optimize analog TX/RX blocks and related circuits in advanced process nodes.
• Create floorplans, extract chip parameters, and simulate analog behavior and models to meet goals.
• Develop and execute comprehensive test plans and verify designs against specifications.
• Optimize circuits for performance, power, area, and yield; identify and resolve design issues.
• Collaborate with architecture and layout teams to deliver robust electrical implementations.
• Provide technical leadership and align technical strategies with organizational objectives.
• Mentor and develop other technical leaders, fostering engineering excellence.

Requirements

Core technical requirements and preferred competencies.

• Must-have: Deep expertise in analog circuit design fundamentals including TX/RX blocks, I/O PHY architecture, low-power techniques, and signal/power integrity.
• Must-have: Proficiency in analog behavior modeling, circuit simulation, and optimization for power, performance, area, and yield.
• Must-have: Demonstrated experience working in advanced semiconductor process nodes on analog or mixed-signal designs.
• Nice-to-have: Familiarity with SerDes fundamentals and industry protocols (e.g., PCIe, UCIe).
• Nice-to-have: Proven track record of influencing technical direction across organizations or the industry.
• Nice-to-have: Strong understanding of analog architecture, layout optimization, and practices for electrical robustness.
• Nice-to-have: Experience mentoring engineering teams and driving cross-functional collaboration.

Education Requirements

Bachelor's (BS) in Electrical Engineering, Computer Engineering, or a related field plus 12 or more years of relevant experience; alternatively, a Master's degree with 10 or more years of relevant experience. (Source specifies degree plus years; no mention of PhD or alternative certifications.)

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.