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Principal Product Engineer, Synthesis

Cadence Design Systems
August 22, 2026
Full-time
On-site
San Jose, California, United States
$136,500 - $253,500 USD yearly
EDA Jobs, Level - Senior

Job Title

Principal Product Engineer, Synthesis

Role Summary

Drive product engineering for Cadence's Genus synthesis solution to improve power, performance, and area (PPA) for advanced digital ASICs. Work closely with R&D, field engineers, and customers to define product requirements, verify new features, and ensure interoperability with other digital implementation tools.

Provide first-line technical support for R&D and customers and translate customer needs into Product Requirement Specifications (PRS).

Experience Level

Senior-level. The posting references at least two years of relevant industry experience in preferred qualifications.

Responsibilities

Core responsibilities for the role include product engineering, verification, customer support, and cross-tool integration related to logic synthesis.

  • Perform product engineering for Genus to achieve best-in-class PPA for digital ASIC designs.
  • Understand internal flows for new features, verify correctness, and run experiments to determine optimal solutions.
  • Solve challenges in physically-aware synthesis to bridge synthesis and place-and-route workflows.
  • Support field engineers and customers as the primary interface between R&D and customers.
  • Verify interoperability of Genus with other Cadence digital implementation tools to enable seamless flows.
  • Gather customer and internal requirements and document Product Requirement Specifications (PRS) for new features.

Requirements

Must-have technical skills and experience, followed by useful additional qualifications.

  • Must-have: Strong logic design and timing-closure skills; ability to debug complex logical and physical timing problems and perform root-cause analysis.
  • Must-have: Experience with digital implementation, synthesis, and timing closure at block and top levels.
  • Must-have: Automation/scripting skills (Perl, Tcl, shell).
  • Must-have: Ability to support customers and coordinate between R&D and users in fast-paced environments.
  • Nice-to-have: Experience with Genus and Innovus or other EDA tools in the digital implementation flow.
  • Nice-to-have: Experience at advanced process nodes (20nm, 28nm and below) and knowledge of physical design, low-power techniques, and formal verification.
  • Nice-to-have: Familiarity with HDL (Verilog/SystemVerilog).

Education Requirements

Requires an MS in Electrical Engineering or ECE with a focus on VLSI; the posting also references two or more years of relevant industry experience. No other degree or certification language was specified.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-08-21