Principal Product Engineer - Memory IP

Job Title

Principal Product Engineer - Memory IP

Role Summary

Provide technical leadership for pre-silicon integration, verification, and post-silicon bring-up of memory subsystem products (memory controller + PHY). Work with customers and internal teams to resolve complex subsystem, implementation, and physical-integration issues.

Primary focus areas include integration reviews, RTL and gate-level verification support, timing closure, SI/PI participation, and improving customer deliverables using scripting and AI-assisted tools.

Experience Level

Senior — typically requires 7+ years experience with a BS or 5+ years with an MS (see Education Requirements for details).

Responsibilities

Key responsibilities for this role include:

• Support pre-silicon integration, usage, and implementation of memory subsystem products (controller + PHY).
• Lead internal system integration and QA testing of memory subsystems.
• Analyze and resolve complex subsystem application or implementation issues; provide technical guidance to customers.
• Run and support RTL and gate-level simulations to verify functionality for customers.
• Assist customers with timing closure, physical integration, and participate in SI/PI reviews for board and package implementation.
• Support post-silicon bring-up and production test activities as needed.
• Contribute to product documentation and customer checklists.
• Use AI-powered tools to increase productivity, extract insights from datasets, and improve deliverables.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Experience with DRAM memory IP families such as DDR5/4/3, LPDDR5/4/3, HBM3, GDDR6 or similar.
• Verilog RTL design and gate-level verification experience.
• Synthesis and static timing analysis experience; physical implementation/verification experience is a plus.
• Familiarity with industry-standard DFT flows and test methodologies.
• Familiarity with package and board design; ability to read schematics and participate in SI/PI reviews.
• Experience supporting customer integrations, debugging subsystem issues, and collaborating across engineering teams.
• Preferred: experience with Memory PHY and DSP-based architectures, embedded microcontroller firmware, scripting, and applying AI solutions to workflows.

Education Requirements

B.S. in Electrical or Computer Engineering (or similar) with 7+ years of experience, or M.S. in Electrical or Computer Engineering (or similar) with 5+ years of experience. The posting allows related technical degrees; no specific certifications were listed. Equivalent practical experience was not explicitly stated.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.