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Principal Product Engineer

Cadence Design Systems
September 21, 2026
Full-time
On-site
San Jose, California, United States
$140,000 - $260,000 USD yearly
EDA Jobs, Level - Senior

Job Title

Principal Product Engineer

Role Summary

Work in the Digital and Signoff Group (DSG) to provide technical place-and-route and timing-closure expertise to customers and internal R&D. Influence tool development by tracking and resolving issues, running benchmarks, and developing implementation flows for advanced nodes.

You will collaborate with R&D, release teams, and customer engagement to improve PPA and signoff flows for advanced chip designs.

Experience Level

Senior-level; typically 5+ years of experience in digital implementation or product/design engineering focused on RTL-to-GDSII flow and timing closure.

Responsibilities

Primary responsibilities include supporting products, resolving customer issues, and improving design flows.

  • Provide technical place-and-route and timing-closure expertise to customers and R&D.
  • Track, reproduce, and debug customer issues; coordinate with R&D and release teams to resolve defects.
  • Run design benchmarks and PPA analyses for advanced nodes (16nm and below).
  • Develop and validate implementation flows, automation scripts, and solutions.
  • Document findings and communicate recommendations to customers and internal teams.

Requirements

Must-have technical skills and experience:

  • 5+ years experience in digital implementation as a design engineer or product engineer.
  • Deep understanding of VLSI physical design and timing analysis; proven timing-closure and PPA optimization experience at 16nm and below.
  • Experience with industry-standard EDA tools for synthesis, physical design, and signoff.
  • Familiarity with clock tree synthesis, routing optimization, and silicon signoff.
  • Exposure to hierarchical design methodologies and low-power design techniques.
  • Automation skills using Perl, Tcl, and shell scripting.
  • Strong analytical skills and clear verbal and written communication.
  • Energetic team player with a focus on problem solving.

Education Requirements

MS in Electrical Engineering required. The posting specifies a Master of Science in EE plus 5+ years of experience in digital implementation; no explicit equivalent-degree language was provided.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-09-20