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Principal Product Engineer - DIP

Cadence Design Systems
August 07, 2026
Full-time
On-site
Shanghai, China
Semiconductor IP Jobs, Level - Senior

Job Title

Principal Product Engineer - DIP

Role Summary

Lead technical engagements for IP (PHY and controller) integration, validation, and customer-facing support. Work with pre-silicon integration, post-silicon bring-up, and verification teams to resolve complex subsystem issues and improve product quality.

Collaborate with global R&D, product engineering, and customers to diagnose problems, drive escalations to resolution, and feed improvements into the product roadmap.

Experience Level

Senior level — requires 8+ years of experience in verification and IP design.

Responsibilities

Primary responsibilities include technical support, IP integration, validation, and customer engagement.

  • Serve as primary technical contact for complex subsystem application or implementation issues; manage and drive case resolution.
  • Support pre-silicon integration, post-silicon bring-up, RTL and gate-level simulation, and timing-closure activities for PHY and controller SoC integration.
  • Investigate, reproduce, and debug system-level and IP-level failures; produce technical analysis and recommended fixes or workarounds.
  • Prioritize and manage escalations; communicate status and risks to customers and internal stakeholders.
  • Create and maintain knowledge-base articles, technical documentation, and product limitation notes.
  • Develop and deliver technical training, seminars, and internal guidance to improve customer adoption and best practices.

Requirements

Must-have technical skills and experience; preferred items noted where applicable.

  • Must-have: 8+ years of verification and design experience focused on IP development and integration.
  • Must-have: Strong background in digital electronics; experienced with Verilog/SystemVerilog and UVM methodology.
  • Must-have: Practical knowledge of memory and communication interface IP protocols such as MIPI (CSI2/DSI/I3C/PHY), PCI Express, DDR/LPDDR, HBM, or USB.
  • Must-have: Strong debugging and problem-solving skills; experience reproducing and diagnosing complex system and IP issues.
  • Must-have: Proficiency in scripting for automation and analysis (TCL, Perl, or Python).
  • Must-have: Experience using case-management and tracking systems (example: Salesforce, Jira) to manage technical issues.
  • Must-have: Strong verbal and written English communication and presentation skills for customer-facing roles.
  • Nice-to-have: Experience with Cadence tools, EDA workflows, or similar IP design platforms.

Education Requirements

Bachelor’s or Master’s degree in Electronics or Electrical Engineering (as stated). No other degrees, fields, certifications, or explicit equivalent-experience language were specified in the posting.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-08-07