Principal PLL IC Design Engineer - TeraWave

Job Title

Principal PLL IC Design Engineer - TeraWave

Role Summary

Lead development of integrated phase-locked loops (PLLs) and clock-distribution systems for Blue Origin's TeraWave satellite communications payloads. Work spans advanced CMOS FinFET and SiGe processes, mmWave frequencies, and integration with RF payloads and SoC components.

This is an onsite role based in San Diego, CA; the Bay Area, CA; or Renton, WA. Relocation assistance is provided and travel is expected up to 10%.

Experience Level

Senior - typically 10+ years of relevant PLL and RF/mmWave design experience.

Responsibilities

Deliver high-performance PLL and clocking subsystems from specification through silicon bring-up and production.

• Lead design and integration of PLLs and clock distribution in advanced CMOS FinFET and SiGe technologies, focusing on phase noise, jitter, spurs, area, and power trade-offs.
• Use Spectre and mixed-signal AMS flows for circuit simulation, verification, and performance optimization.
• Collaborate with RF and SoC system architects to define PLL requirements and ensure proper integration into RF payloads and terminals.
• Oversee layout, top-level integration, floorplanning, and verification for successful tape-out cycles.
• Develop test plans, support silicon bring-up, characterize devices, and drive performance and yield improvements with validation/product teams.
• Investigate and implement analog building blocks to improve overall circuit performance.
• Mentor and guide junior engineers on analog/RF design best practices and verification methods.

Requirements

Key must-have skills and constraints for successful candidates.

• Must-have: 10+ years designing high-speed (>20 GHz) PLLs and LO generation for RF/mmWave applications.
• Proven expertise in loop design to meet phase noise/jitter and spur targets while optimizing area and power.
• Experience with clock domain synchronization in systems with multiple PLLs/clock domains.
• Strong mixed-mode and RF modeling, simulation, and verification experience using tools such as MATLAB, Spectre, SystemVerilog, and AMS.
• Extensive experience in PLL silicon characterization, debugging, and bring-up.
• Design experience with analog/RF building blocks: amplifiers, filters, mixers, harmonic-rejection mixers, pre-scalers, and frequency multipliers.
• Fundamental understanding of device physics to inform process selection and performance optimization.
• Authorization requirement: must be a U.S. citizen or national, U.S. permanent resident (Green Card), or lawfully admitted as a refugee or granted asylum.

• Nice-to-have: Experience with fractional-N PLLs, all-digital PLLs (ADPLL), sub-sampling PLLs, LDOs, bias generators, and op-amps.
• Familiarity with digital design, digital verification, and SystemVerilog modeling.

Education Requirements

Bachelor's degree in Electrical Engineering or a related technical discipline is required. Advanced degree (MS or PhD) in Electrical Engineering or related field is preferred.

About the Company

Company: Blue Origin

Headquarters: Kent, Washington, United States

Blue Origin is an American aerospace company developing technologies for spaceflight, including reusable launch vehicles, orbital and suborbital systems, and space infrastructure for commercial and government customers.